2008Sp61C-L17-mjj-InstructionRepIII-2up

2008Sp61C-L17-mjj-InstructionRepIII-2up - UC Berkeley CS61C...

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CS61C L17 MIPS Instruction Format III (1) Spring 2008 © UCB iPhone games! (and general SDK) Apple is (fnally) releasing an iPhone So±tware Developer Kit on March 6th (?) That means iPhone games that use both touch and accelerometer input! TA Matt Johnson inst.eecs.berkeley.edu/~cs61c -tm inst.eecs.berkeley.edu/~cs61c UC Berkeley CS61C : Machine Structures Lecture 17 Instruction Representation III 2008-03-03 youtube.com/watch?v=hy0ptZisr70 CS61C L17 MIPS Instruction Format III (2) Spring 2008 © UCB Review MIPS Machine Language Instruction : 32 bits representing a single instruction Branches use PC-relative addressing, Jumps use absolute addressing. opcode rs rt immediate opcode rs rt rd funct shamt R I J target address opcode
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CS61C L17 MIPS Instruction Format III (3) Spring 2008 © UCB Outline Disassembly Pseudoinstructions “True” Assembly Language (TAL) vs. “MIPS” Assembly Language (MAL) CS61C L17 MIPS Instruction Format III (4) Spring 2008 © UCB Decoding Machine Language How do we convert 1s and 0s to assembly language and to C code? Machine language assembly C? For each 32 bits: 1. Look at opcode to distinquish between R- Format, J-Format, and I-Format. 2. Use instruction format to determine which ±elds exist. 3. Write out MIPS assembly code, converting each ±eld to name, register number/name, or decimal/hex number. 4. Logically convert this MIPS code into valid C code. Always possible? Unique?
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CS61C L17 MIPS Instruction Format III (5) Spring 2008 © UCB Decoding Example (1/7) Here are six machine language instructions in hexadecimal: 00001025 hex 0005402A hex 11000003 hex 00441020 hex 20A5FFFF hex 08100001 hex Let the frst instruction be at address 4,194,304 ten (0x00400000 hex ). Next step: convert hex to binary CS61C L17 MIPS Instruction Format III (6) Spring 2008 © UCB Decoding Example (2/7) The six machine language instructions in binary: 00000000000000000001000000100101 00000000000001010100000000101010 00010001000000000000000000000011 00000000010001000001000000100000 00100000101001011111111111111111 00001000000100000000000000000001 Next step: identi±y opcode and ±ormat 1 , 4-62 rs rt immediate 0 rs rt rd funct shamt R I J target address 2 or 3
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CS61C L17 MIPS Instruction Format III (7) Spring 2008 © UCB Decoding Example (3/7) Select the opcode (frst 6 bits) to determine the ±ormat: 00000000000000000001000000100101 00000000000001010100000000101010 00010001000000000000000000000011 00000000010001000001000000100000 00100000101001011111111111111111 00001000000100000000000000000001 Look at opcode : 0 means R-Format, 2 or 3 mean J-Format, otherwise I-Format.
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2008Sp61C-L17-mjj-InstructionRepIII-2up - UC Berkeley CS61C...

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