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Unformatted text preview: ECE2022 HOMEWORK # 5 D07 To make the grading easier, please draw a rectangle around each ﬁnal answer, where appropriate. Number your solutions just like below! This assignment is due Nonday, April
23, bring to class. Pull Up Design Problem 1 (25 points) .
A pull up circuit is to be designed for use with an input circuit which must drive two 74LSO4 logic
gates. We will determine the maximum resistance, such that when the switch is open, Vin will be 2.7V, well within the logic high range. Please do not introduce any safety factorsm, just give the maximum usable resistance. Refer to the attached 74LSO4 data sheet to verify that 1m = 20,uA at
Vm = 2.7V. (a) Determine the required Rpu. (b) When the switch is closed, V, will correspond to a logic low. Estimate the current through
the pull—up resistor, 1m, when the switch is closed. (c) How much power (in milliWatts) is lost to heating this resistor when the switch is at a logic
high? (d) If we needed to drive 20 74LSO4 gates instead of the two shown in the diagram, what would
be value of the pull up resistor have to be? (e) Would the circuit design from part (d) above still work correctly (even if it is inefﬁcient) if only
one 74LSO4 gate were connected to it instead of the 20 gates for which it was designed? SN54/74LSO4 Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs Guaranteed Input LOW Voltage for
All Inputs Input HIGH Voltage 
= 
— Input Clamp Diode Voltage
3'5  Vcc  MIN, IOH = MM VIN = VIH
VOL Output LOW Voltage VIN = VIL or VIH
"m m
Input HIGH Current In.
Short Circuit Current (Note 1) Power Supply Current
Total, Output HIGH Total, Output LOW mA VCC = MAX
Test Conditions Vcc = 5.0 V
CL =15 pF Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C) m
_m
_n M CAQT AND! .Q 1‘“ nATA w...“ Problem 2 — 40 points total For the function F described by this truth table; ((1) Four Variable Map W X Y Z F
0 0 O 0
O 0 0 1 0
O 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 1
0 1 1 0 1
0 1 1 1 1
1 0 0 O 0
1 0 0 l O
1 0 1 O 0
1 O 1 1 0
1 1 0 0 1
1 1 O 1 1
1 1 1 0 O
1 1 1 1 0 (a) Use a Karnaugh map to produce a simpliﬁed sum of products form. (Show both the Kamaugh
map and Sum of Product expression) (b) Draw the circuit diagram for an implementation from your simpliﬁed sum of products expres sion using just AND Gates and OR gates (assumming as usual that you have access to each
literal and its logical inversion). (c) Use the Karnaugh map to produce a simpliﬁed sum of products solution that would not exhibit
and static—one hazards. (d) Draw the circuit diagram for an implementation from your hazard free simpliﬁed sum of prod ucts expression using just AND Gates and OR gates (assumming as usual that you have access
to each literal and its logical inversion) (e) Use a Karnaugh map to produce a simpliﬁed product of sums form. (Show both the Karnaugh
map and simpliﬁed expression) ' (f) Draw the circuit diagram for an implementation from your simpliﬁed product of sums expression
using just AND Gates and OR gates (assumming as usual that you have access to each literal
and its logical inversion). (g) Use the Karnaugh map to produce a simpliﬁed product of sums solution that would not exhibit
and static—zero hazards. (h) Draw the circuit diagram for an implementation from your hazard free simpliﬁed product of sums expression using just AND Gates and OR gates (assumming as usual that you have
access to each literal and its logical inversion). Problem 3 — 15 points total A I??? Latch is connected to two switches that allow us to put various logic values on the inputs
sequentially. In the following questions, I will state the next input pair of values and you state the
values of the Q and QN outputs. Remember, sequence of events is important. ...
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 Spring '07
 Cyganski

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