04-04simpleCodeGenerator - Administrivia Code generation...

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1 CSE 450: Compilers K. Stirewalt Code generation Design of simple code generator Topics: – Basic-block code generator Readings: Dragon Book 8.6 CSE 450: Compilers K. Stirewalt Administrivia Final exam: Friday, May 2 nd from 10:00- 12:00 noon in this room Graduating seniors may take the exam Wednesday, April 30th, from 9am - 11am in room 3105 Engineering CSE 450: Compilers K. Stirewalt Simple code generator Generates code for a single basic block – Considers each 3-addr instruction in turn – Keeps track of what values are in what registers to avoid generating unnecessary loads and stores – After generating any necessary loads, generates the target instruction that best matches the 3-address instruction – If necessary, then generates the store instruction Store instructions generated for values that: – exist only in register that is needed for another value – are live on exiting the basic block CSE 450: Compilers K. Stirewalt Tracking values during generation To track location of values and the contents of registers, we need to keep a special data structure Needs: – Track what program variables have their value stored in a register and which register – Track what value(s) currently stored in each register – Track whether the memory location allocated for a variable holds its current value CSE 450: Compilers K. Stirewalt Register/address descriptors For each available register, a register descriptor tracks each name whose current value is in that register – Because we are generating code for each basic block, all register descriptors initially empty – As code gen progresses, each register will hold zero or more names. For each name (program variable or compiler- generated temporary) an address descriptor tracks the location(s) where the current value of that name can be found CSE 450: Compilers K. Stirewalt Generating instructions for operations For each three-address instruction: x = y + z do the following: 1. Use special function getReg(x = y + z) to choose registers Rx, Ry, and Rz 2. If y is not in Ry, then issue an instruction LD Ry, y’ where y’ is one of the locations for y 3. Similarly for z and Rz 4. Issue instruction ADD Rx, Ry, Rz
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2 CSE 450: Compilers K. Stirewalt Generating instructions for copy operations An important special case We assume getReg will always choose the same register for both x and y If y not already in that register, then generate a LD instruction and adjust register descriptor as appropriate; otherwise do nothing CSE 450: Compilers K. Stirewalt Ending the basic block Values defined and used within the block
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04-04simpleCodeGenerator - Administrivia Code generation...

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