L17 lecture full - MOS Sample & Hold Ideal Sampling 1...

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EECS 240 Lecture 17: MOS S & H B. Boser 1 MOS Sample & Hold Ideal Sampling Practical Sampling v IN v OUT C S1 φ 1 v IN v OUT C M1 φ 1 • Grab exact value of V in when switch opens • kT/C noise • Finite R sw Æ limited bandwidth •R sw = f(V in ) Æ distortion • Switch charge injection • Clock jitter
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EECS 240 Lecture 17: MOS S & H B. Boser 2 kT/C Noise 2 2 1 2 12 12 FS B B B V T k C C T k 0.003 pF 0.8 pF 13 pF 206 pF 52,800 pF 8 12 14 16 20 C min (V FS = 1V) B [bits]
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EECS 240 Lecture 17: MOS S & H B. Boser 3 MOSFET as Resistor • “off” state –R off –I off … beware of subthreshold conduction – Capacitive coupling –T - sw i t c h • “on” state – Operate in triode region with V DS small – Nonlinear – Threshold voltage, Body effect –N /P /C -MOS – Constant V GS switch
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EECS 240 Lecture 17: MOS S & H B. Boser 4 Switch On-Resistance M_n 10 / 0.35 Supply VDD = 3V VSS = 0V VC_N 1us VC_P 1us M_p 25 / 0.35 Vi VDS dc = 100mV MOS Switch On-Resistance DC Analysis sweep from 0 to 3 (100 steps) Device Vi DC_Vi vcn vcp va vb M_const 10 / 0.35 VC_CONST 1us
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EECS 240 Lecture 17: MOS S & H B. Boser 5 Acquisition Bandwidth The resistance R of switch S1 turns the sampling network into a lowpass filter with risetime = RC = τ Assuming V in is constant during the sampling period and C is initially discharged (a good idea—why?): v IN v OUT C S1 φ 1 R ( ) τ / 1 ) ( t in out e v t v =
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EECS 240 Lecture 17: MOS S & H B. Boser 6 Switch On-Resistance Example: B = 14, C = 13pF, f s = 100MHz T/ τ >> 19.4, R << 40 v IN v OUT C S1 φ 1 φ 1 T=1/f S R () CB f R B T T V v e v f t v v s B FS in f in s out in s 72 . 0 72 . 0 1 2 ln 1 2 : Case Worst 2 1 2 1 << << = << << = τ
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EECS 240 Lecture 17: MOS S & H B. Boser 7 Switch On-Resistance () TH DD in TH DD in DS V V v o ON TH DD ox o V V v o in TH DD ox TH GS ox ON V DS triode D ON DS DS TH GS ox triode D R R V V L W C R R v V V L W C V V L W C R dV dI R V V V V L W C I = = = = = = 1 1 ith w 1 1 1 1 2 0 ) ( ) ( µ
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EECS 240 Lecture 17: MOS S & H B. Boser 8 Sampling Distortion 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 -120 -100 -80 -60 -40 -20 0 H 1 = -49.4dBFS H 2 = -66.3dBFS H 3 = -105.2dBFS DC = -43.4dBFS A = -0.1dBFS Frequency [ f / f s ] Amplitude [ dBFS ] N = 16384 SNR = 61.9dB SDR = 49.2dB SNDR = 47.4dB SFDR = 49.3dB = TH DD in V V v T in out e v v 1 2 1 τ T/ τ = 10 V DD –V TH = 2V V FS = 1V
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EECS 240 Lecture 17: MOS S & H B. Boser 9 Sampling Distortion T/ τ = 20 V DD –V TH = 2V V FS = 1V 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 -120 -100 -80 -60 -40 -20 0 H 1 = -69.5dBFS H 2 = -76.3dBFS H 3 = -83.5dBFS DC = -65.3dBFS A = -0.0dBFS Frequency [ f / f s ] Amplitude [ dBFS ] N = 16384 SNR = 62.0dB SDR = 68.6dB SNDR = 58.6dB SFDR = 69.5dB • SFDR is very sensitive to sampling distortion • Solutions: • Overdesign switches Æ increased switch charge injection Æ
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This note was uploaded on 08/01/2008 for the course EECS 240 taught by Professor Boser during the Spring '04 term at University of California, Berkeley.

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L17 lecture full - MOS Sample &amp; Hold Ideal Sampling 1...

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