L10 lecture full - Settling Speed/accuracy metrics...

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EECS 240 Lecture 10: Settling © 2004 B. Boser 1 Settling Speed/accuracy metrics Continuous time circuits – Bandwidth – Loop-gain, slew rate Æ distortion Switched capacitor circuits – Step response – Loop-gain Æ settling accuracy – Loop-bandwidth Æ settling time Φ 2 C f Φ 1 Φ 1 C s Φ 2 Φ 2 V i V o
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EECS 240 Lecture 10: Settling © 2004 B. Boser 2 Step Response Φ 2 C f Φ 1 Φ 1 C s Φ 2 Φ 2 V i V o V i -V o /A v time
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EECS 240 Lecture 10: Settling © 2004 B. Boser 3 Step Response Analysis C f C s V i V o • Static error •Dynam ic e r ro r
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EECS 240 Lecture 10: Settling © 2004 B. Boser 4 Static Error A vo C f C s V i V o C p V x V i -V o /A v time static error { o T vo i o FA c V V 1 1 + = KCL Æ f s vo x o p s f f C C c A V V C C C C F = = + + = with
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EECS 240 Lecture 10: Settling © 2004 B. Boser 5 Static Error (cont.) Example: Closed loop gain: c = -4 C f = 1pF, C s = 4pF, C p = 1pF Æ F = 1/6 Note: C p hurts! Error specification: <0.1% Æ FA vo > 1000 Æ A vo > 6000 over output range Beware: other (dynamic errors) add! { + = error relative 1 1 1 1 vo vo i o FA c FA c V V
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EECS 240 Lecture 10: Settling © 2004 B. Boser 6 Dynamic Errors • Error sources – Finite bandwidth – Feedforward zero – Non-dominant poles – Doublets – Nonlinear effects: slewing • Analysis approach – One error at a time! – In particular: treat static and dynamic errors separately – Final result: superposition of all individual errors
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