L14 lecture - Comparator fs Vi+ ViDo+ DoAv Latch Clock rate...

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EECS 240 Lecture 14: Comparators B. Boser 1 Comparator Clock rate f s Offset Resolution Overload Recovery Input capacitance (and linearity!) Power dissipation Common-mode rejection Kickback noise •… A v Latch V i+ V i- D o+ D o- f s EECS 240 Lecture 14: Comparators B. Boser 2 Flash Converter • Very fast: only 1 clock cycle per conversion • High complexity: 2 B -1 comparators • High input capacitance R/2 R R R R/2 R Encoder Digital Output V IN V REF
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EECS 240 Lecture 14: Comparators B. Boser 3 Comparator Gain Example: 12-Bit / 100MS/s ADC 1V full-scale input Æ 1 LSB = 1V / 2 12 = 240 µ V Æ A v > 1V / 120 µ V = 8000 in 5ns! EECS 240 Lecture 14: Comparators B. Boser 4 Operational Amplifier? A vo f u f -3dB Gain Freq THz 3 . 1 ns 1 2 8000 2 2 1 3 3 = × = = = = π πτ τ vo u dB vo u dB A f f A f f
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EECS 240 Lecture 14: Comparators B. Boser 5 Open-Loop Amplifier Cascade EECS 240 Lecture 14: Comparators B. Boser 6 Cascaded Amplifier • Step response: () M in T o d m o m o in T o d m o m o in d T o m in m o V T
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This note was uploaded on 08/01/2008 for the course EECS 240 taught by Professor Boser during the Spring '04 term at University of California, Berkeley.

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L14 lecture - Comparator fs Vi+ ViDo+ DoAv Latch Clock rate...

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