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Apr20 - CSE398 Network Systems Design Instructor Dr Liang...

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CSE398: Network Systems Design Instructor: Dr. Liang Cheng Department of Computer Science and Engineering P.C. Rossin College of Engineering & Applied Science Lehigh University April 20, 2005
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/20/05 Outline Recap SystemC APP500: classification & state engine blocks Traffic manager Summary and homework
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/20/05 Outline Recap Traffic manager Buffer management, traffic shaping, stream editing Summary and homework
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/20/05 APP550 Overview Programmable through FPL Programmable through C-NP Configurable through API Statistics Memory Policing Engine PCI Interface State Engine Fixed-Function Hardware Utility PDU Assembler Queue Table Reorder Buffer DID Table Buffer Management Engine Traffic Shaping Engine Packet Generation Engine Stream Editor Engine Scheduler Table Logical Port Table Port Manager Table MAC TX Interface Output Interface Output Port Table Traffic Manager Checksum Generator Data Port GMII/SMII/PMA Data Port SPI-3/Utopia Coprocessor Port SPI-3 Legend MAC RX Interface Input Interface Input Port Table Pattern Processing Engine Classifier Pattern Tables Data Port GMII/SMII/PMA Data Port SPI-3/Utopia Coprocessor Port SPI-3 Management Port SPI-3 Host Processor Device API FPI FPI
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/20/05 Primary Functions Buffer management Completion of flow policing and packet discard Traffic shaping Bandwidth allocation Packet modification
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Instructor: Dr. Liang Cheng
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