Apr11 - CSE398: Network Systems Design Instructor: Dr....

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CSE398: Network Systems Design Instructor: Dr. Liang Cheng Department of Computer Science and Engineering Lehigh University April 11, 2005
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/11/05 Outline ± Recap ± Reminder: homework due today ± Overview of Agere’s network processor ± State engine and scripting language ± Summary
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/11/05 First Generation before Agere PayloadPlus (APP) ± Three separate chips ± FPP+RSP: fast path of data plane ± ASI: statistics, interface to a host microprocessor for system mgmt.
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/11/05 Second Generation ± A single IC but various models ± APP550: four GigE ports with full capability ± Classification: pattern processor ± Forwarding: traffic manager and modifier ± Statistics and host communication: state engine
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/11/05
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 04/11/05 State Engine (SE) ± Contains memory used to store statistics ± Classifier invokes a SE function to store or increment a value in memory ± Performs computations needed for traffic policing ± Only the 1 st step ? ± Provides an interface to an external host processor ± Configuring and initializing APP550 - FCRAM ± Slow path
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design
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This note was uploaded on 08/06/2008 for the course CSE 398 taught by Professor Cheng during the Spring '05 term at Lehigh University .

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Apr11 - CSE398: Network Systems Design Instructor: Dr....

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