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Feb28 - CSE398 Network Systems Design Instructor Dr Liang...

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CSE398: Network Systems Design Instructor: Dr. Liang Cheng Department of Computer Science and Engineering P.C. Rossin College of Engineering & Applied Science Lehigh University February 23, 2005
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 02/23/05 Outline Recap Protocol software Hardware architecture Summary and homework
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 02/23/05 Outline Recap Hardware architecture for protocol processing Summary and homework
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 02/23/05 A Brief History of Computer Hardware 1940s Beginnings 1950s Consolidation on von Neumann architecture I/O controlled by CPU 1960s I/O becomes important Evolution of third generation architecture with interrupts
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Instructor: Dr. Liang Cheng CSE398: Network Systems Design 02/23/05 I/O Processing Low-end systems (e.g., microcontrollers) Dumb I/O interfaces CPU does all the work (polls devices) Single, shared memory Low cost, but low speed Mid-range systems (e.g., minicomputers) Single, shared memory I/O interfaces contain logic for transfer and status Operations: CPU starts device then resumes processing Device: transfers data to / from memory; interrupts when operation complete High-end systems (e.g., mainframes)
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