lecture 9 - Announcements Project 2 due Tuesday 2/26...

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1 Announcements • Project 2 due Tuesday 2/26 • Homework 3 will be posted 2/26 • Project 3 will be posted 2/26 ECE/CS 314 Endianness Review • A 32-bit HEX value W 1 W 0 X 1 X 0 Y 1 Y 0 Z 1 Z 0 is to be tored at address stored at address A • Memory is byte addressable so this 32-bit value is stored at byte addresses –A , A+1 , A+2 and A+3 • A Big-Endian Memory stores ECE/CS 314 W 1 W 0 at A , X 1 X 0 at A+1 , Y 1 Y 0 at A+2 , Z 1 Z 0 at A+3 • A Little-Endian Memory stores –W 1 W 0 at A+3 , X 1 X 0 at A+2 , Y 1 Y 0 at A+1 , Z 1 Z 0 at A Endianness Review • A16-bit HEX value Y 1 Y 0 Z 1 Z 0 is to be stored t address at address A • Memory is byte addressable so this 32-bit value is store at byte addresses and A+1 •A Big-Endian Memory stores ECE/CS 314 Y 1 Y 0 at A , Z 1 Z 0 at A+1 Little-Endian Memory stores –Y 1 Y 0 at A+1 , Z 1 Z 0 at A Endianness Review • An 8-bit HEX value Z 1 Z 0 is to be stored at ddress address A • Memory is byte addressable so this 32-bit value is store at byte address Big-Endian Memory stores ECE/CS 314 –Z 1 Z 0 at A Little-Endian Memory stores 1 Z 0 at A
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2 Today’s Topic • Digital Logic – Sequential • Verilog Hardware Modeling – How to implement digital logic using a HDL – Verilog syntax/details to be covered in section ECE/CS 314 Sequential Circuits • The output of a sequential circuit depends on urrent inputs and past inputs current inputs and past inputs – I.e., circuit “remembers” past events • Idea: – Introduce devices that can hold state • Called state-holding elements (e.g., flip-flops) – Next state depends on previous state (stored in stat- olding elements) and circuit inputs ECE/CS 314 holding elements) and circuit inputs – Outputs depend on previous state and circuit inputs – Next state and outputs calculated using combinational circuits State Machine Structure Combinational Logic inputs outputs next state current state ECE/CS 314 State Memory clock D Flip-flops • A flip-flop is a 1-bit memory – Stores 1 bit of “state” information – Changes state on each “tick of the clock” • Positive edge-triggered flip-flops D CLK Q QN
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lecture 9 - Announcements Project 2 due Tuesday 2/26...

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