section2 - ECE/CS 314 Spring 2008 Section Notes #2 1....

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1 ECE/CS 314 Spring 2008 Section Notes #2 1. Assembler Directives In addition to assembly code, your assembly-language program needs some extra information to properly create an executable. This extra information is supplied via assembler directives. Below is a list of directives you might come across: .text indicates that the following instruction declarations are part of the program code .data indicates that the following values are program data .ascii str insert ascii string ‘ str ’ into memory .asciiz str same as above, but with a null byte at the end .word n1, n2, … insert a series of 32-bit values into memory .half n1, n2, … insert a series of 16-bit values into memory .byte n1, n2, … insert a series of 8-bit values into memory . space n reserve space for n bytes (initialized to zero by convention) .align m align the next datum on 2*m byte boundary (MIPS specific) .globl makes a label externally visible (for the linker) .ent func indicates the entry point of a function (for the debugger) .end func indicates the end of a function (for the debugger) .noreorder disable automatic branch-delay slot filling (don’t do this) .noat the assembler may not use the $at register (turns off pseudo-ops… don’t do this either) It is permissible to have many text and data directives in one assembly program. 2. Decoding Instructions a. Instruction sets The MIPS instruction set is a RISC (Reduced Instruction Set Computer) load-store architecture, with a (mostly) orthogonal instruction set. This means that the instructions are simple, there aren’t that many of them, the instructions can output to any register (excepting HI and LO), and are all instructions are 32 bits in length. Examples of more complicated instruction sets: x86 is CISC, has variable length instructions, some instructions output to hard- coded registers, and instructions can address memory directly. An example of a CISC x86 instruction is: lea 0xdeadbeef(%ebx,%ecx,4),%eax The above takes the value of register ebx, adds in 4 times the value of ecx, adds the 32-bit constant 0xdeadbeef to it, and stores the final version in eax. This particular instruction ends up being 7 bytes long.
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2 The HP PA-RISC architecture is supposedly RISC, but includes instructions such as: depw,z,= %r1,%rsar,8,%r2 The above takes the 8 right-most bits of register %r1, shifts those bits left by the amount in the special register %rsar, and copies this value to %r2 (which is zeroed first). Also, if all bits in the result are zero, it cancels the immediately following instruction. b. MIPS Instruction Set There are many references available that describe the MIPS instruction set: the textbook your lecture notes the MIPS manual. Use this manual frequently. It details every instruction’s implementation, what it should do, and what it should not do. It gives opcodes, structure, quirks, and everything you need to know about each instruction. It can be found at: http://www.csl.cornell.edu/courses/ece314/resources/MIPS_Vol2.pdf
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section2 - ECE/CS 314 Spring 2008 Section Notes #2 1....

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