prelim1_sp05sol

# prelim1_sp05sol - NETID NAME SIGNATURE ECE 314 Prelim Exam...

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NETID______________________________ Page 1 of 13 NAME:_____________________________ SIGNATURE:________________________ ECE 314 Prelim Exam March 17, 2005 Normal academic integrity rules apply.

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NETID______________________________ Page 2 of 13 Question Possible Points Points Earned Number Representation 15 Performance 20 MIPS Simulation and C 15 Digital Logic 20 MIPS Assembler 20 Floating Point Representation 10 Total 100
NETID______________________________ Page 3 of 13 Q.1. (15 pts) Number Representation Perform the following conversions: integer binary 11010010111010101001010010110001 is equivalent to hex: 2’s complement 10010100 is equivalent to decimal: decimal (–37) 10 is equivalent to (8-bit) sign/magnitude binary: decimal (–1) 10 is equivalent to (10-bit) 2’s complement binary: (8-bit) unsigned binary 10101010 is equivalent to decimal: Solution: (2pts each) D2EA94B1, -108, 10100101, 1111111111, 170 Extra Credit (2 points) How to represent decimal number 7 and 63 in 8-bit unsigned base –2? Yes, it is –2, instead of 2. Solution: (1pt each) 1. 7 10 = 1 + 2 + 4 = 2 0 + 2 1 + 2 2 = (-2) 0 + (-2) 2 + (-2) 1 + (-2) 2 = (-2) 0 + (-2) 1 + 2 3 = (-2) 0 + (-2) 1 + (-2) 3 + (-2) 4 = 00011011 -2 2. 63 10 = 64 - 2 + 1 = (-2) 6 + (-2) 1 + (-2) 0 = 01000011 -2 Hint: Decimal 1 2 4 8 16 32 …… Power of 2 2 0 2 1 2 2 2 3 2 4 2 5 …… Power of (-2) (-2) 0 (-2) 2 + (-2) 1 (-2) 2 (-2) 4 + (-2) 3 (-2) 4 (-2) 6 + (-2) 5 ……

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NETID______________________________ Page 4 of 13 Q2. (20 pts) Performance It turns out that for many scientific computations (think linear algebra libraries, and matrix manipulations) perform so many sequences of multiplications followed immediately by additions that many high-performance computers have been designed with a single multiply-add instruction. Consider adding such an instruction to the MIPS. Give it the form "mad \$R1, \$R2, \$R3", where \$R1 \$R1 + (\$R2 * \$R3) Now suppose you have the following mix of 100 instructions without the new instruction, and then with the new instruction, both for the same computation. Because the multiply- add instruction has to accomplish more work than the other MIPS RISC instructions, we must increase the clock cycle time by a factor 1.15. In return, we can replace 4/5 of the ALU instructions by the MAD instruction. a) (3 pts) Fill in the table below:
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## This note was uploaded on 09/05/2008 for the course ECE 314 taught by Professor Mckee/long during the Spring '08 term at Cornell.

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prelim1_sp05sol - NETID NAME SIGNATURE ECE 314 Prelim Exam...

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