ECE314sp08_HW5 - ECE/CS 314 Spring 2008 Homework 5 Due...

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1 ECE/CS 314 Spring 2008 Homework 5 Due Tuesday, April 8, 2008 before 10:00pm EST Homework Submission Policies 1. Show your work where appropriate. 2. Homework Assignments are done individually without calculators . 3. Homework must be typed and submitted in plain text or PDF format. No scanned PDF (or scanned ANYTHING) allowed. 4. All homework should be submitted through CMS. Under no circumstances should a submission be made by sending the completed assignments to a course staff by email, unless explicitly requested. (Make sure you are signed up for the class on CMS BEFORE the submission deadline.) 5. In general, late submissions will not be graded. However, if CMS is down prior to a deadline, please contact the course staff BEFORE the deadline and make a submission when the system is back up (it will not be penalized). 6. Questions may be directed to the ECE/CS 314 consultants.
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2 Problem 1. (40 points) The Branch Control is an integral part of the pipelined processor. The text devotes a great deal of discussion to the placement of the Branch Control, suggesting at various times that it can be placed in the ID, EX, or MEM stages, but leaving the optimal placement of this important unit somewhat vague, at best. a) What are the advantages and disadvantages of placing the Branch Control in the ID stage? Consider the effect on data hazards, control hazards, and overall performance. Give specific examples, where appropriate, to illustrate these advantages and/or disadvantages. b) What are the advantages and disadvantages of placing the Branch Control in the EX stage? Consider the effect on data hazards, control hazards, and overall performance. Give specific examples, where appropriate, to illustrate these advantages and/or disadvantages. c) What are the advantages and disadvantages of placing the Branch Control in the MEM stage? Consider the effect on data hazards, control hazards, and overall performance. Give specific examples, where appropriate, to illustrate these advantages and/or disadvantages.
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Problem 2. (30 points) Suppose that the following table shows part of an instruction memory starting at address 0x04ec: Address Instruction Mnemonic 0x000004ec 00000000 nop 0x000004f0 00000000 nop 0x000004f4 00000000 nop 0x000004f8 00000000 nop 0x000004fc 00000000 nop 0x00000500 8ca30004 lw $3,4($5) 0x00000504 20a50004 addi $5,$5,4 0x00000508 00e33820 add $7,$7,$3 0x0000050c ac270000 sw $7,0($1) 0x00000510 20210001 addi $1,$1,1 0x00000514 00000000 nop 0x00000518 00000000 nop 0x0000051c 00000000 nop 0x00000520 00000000 nop 0x00000524 00000000 nop Using the tables at the end of the assignment, trace the execution of these instructions for 9 cycles, starting with the execution of the instruction at address 0x00000500. The initial table has been filled in for you, including initial values for the registers and a chunk of data memory. Fill in the remaining tables for the pipeline registers, register file, and data memory
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This note was uploaded on 09/08/2008 for the course ECE 314 taught by Professor Mckee/long during the Spring '08 term at Cornell University (Engineering School).

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ECE314sp08_HW5 - ECE/CS 314 Spring 2008 Homework 5 Due...

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