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Finite State Machine - Finite State Machines Presented by...

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Real Time Embedded Systems Real Time Embedded Systems Finite State Machines Presented by: Hussein Bin Sama & & Tareq Alawneh   Supervisor: Dr.Lo`ai Tawalbeh
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Real Time Embedded Systems Real Time Embedded Systems Outlines FSM Introduction. FSM Design. VHDL Design of FSM. FSM minimization. Case Study.
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Real Time Embedded Systems Real Time Embedded Systems FSM definition Finite state machine (FSM)   FSM is a model of behavior  composed of a finite number of  states transitions  between those  states, and  actions .  
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Real Time Embedded Systems Real Time Embedded Systems Concept of the State Machine   Computer Hardware = Datapath + Control Registers Combinational Functional        Units (e.g., ALU) Busses FSM generating sequences       of control signals Instructs datapath what to       do next Datapath status Control Control Datapath State Control Signal Outputs Datapath status
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Real Time Embedded Systems Real Time Embedded Systems Mealy vs. Moore State Machines Finite State Machines (FSM) are of two types: Moore Machines Next State = Function(Input, Present State) Output = Function(Present State) Mealy Machines Next State = Function(Input, Present State) Output = Function(Input, Present State)
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Real Time Embedded Systems Real Time Embedded Systems Moore FSM Present State Register Next State Function (comb. logic) Output Function (comb. logic) Inputs Present State Next State Outputs clock reset Output Is a Function of a Present State Only state 1 / output 1 state 2 / output 2 transition condition 1 transition condition 2
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Real Time Embedded Systems Real Time Embedded Systems Mealy FSM Output Is a Function of a Present State and Inputs Next State Function (comb. logic) Output Function (comb. logic) Inputs Present State Next State Outputs Present State Register clock reset state 1 state 2 transition condition 1 / output 1 transition condition 2 / output 2
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Real Time Embedded Systems Real Time Embedded Systems Moore FSM - Example Moore FSM that Recognizes Sequence “10” S0 / 0 S1 / 0 S2 / 1 0 0 0 1 1 1 reset
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Real Time Embedded Systems Real Time Embedded Systems Mealy FSM - Example Moore FSM that Recognizes Sequence “10” S0 S1 0 / 0 1 / 0 1 / 0 0 / 1 reset
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Real Time Embedded Systems Real Time Embedded Systems Moore and Mealy Machines States vs. Transitions Mealy Machine typically has fewer states than Moore Machine for same output sequence Same I/O behavior Different # of states 1 1 0 1 2 0 0 [0] [0] [1] 1/0 0 1 0/0 0/0 1/1 1 0
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Real Time Embedded Systems Real Time Embedded Systems Finite State Machine Word Problems Finite String Pattern Recognizer A finite string recognizer has one input (X)    and one output (Z ).The output is asserted  whenever the input sequence …010…has  been observed, as long as the sequence 100  has never been seen.
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Real Time Embedded Systems Real Time Embedded Systems
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