fa96-quiz1 - Computer Science 252 Quiz #1 Name:_ Question...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
1 Quiz #1 F96 1/23/97 Computer Science 252 Quiz #1 Name:_________________ Question 1:_____/ 7 Question 2:_____/ 4 Question 3:_____/ 8 Question 4:_____/ 6 Question 5:____/ 10 Total:_____/35 This exam consists of five questions , and is worth a total of 30 points . Take your time and make sure to show all work . Answers without justification will not receive full credit. Good luck! "The Hierarchical Detective" [7 points] 1. For one uniprocessor system, the time to access main memory is 200 nanoseconds. Assume that there is no contention in the memory hierarchy. Measured from the time that it begins execution, a single load instruction can take many different times. The following measurements are sorted from fastest to slowest. For each of the following timings, give the most likely explanation of why the load took that long. Assume any caches are write through. a) 10 nanoseconds b) 50 nanoseconds c) 200 nanoseconds d) 400 nanoseconds e) 20 milli seconds (20 x 10 6 nanoseconds) f) Give 3 details about the organization and implementation of the uniprocessor system that you can deduce from these measurements.
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
2 Quiz #1 F96 1/23/97 Name:_________________ "Branching Out” [4 points] 2. The classic 5-stage pipeline presented in Chapter 3 has a 1 clock cycle branch delay provided the branch condition is checked in the second stage and the branch address is calculated in the second stage. This one-cycle delay is part of the DLX architecture. More recent implementations have gone to longer pipelines, such as the 8-stage pipeline of the R4000 presented in Chapter 3. R4000 instruction fetch takes 2 stages and data fetch takes 3 stages. The R4000 checks the branch condition and calculates the branch address in the fourth stage (EX). a) Suppose the machine is going to use static branch prediction for the 8-stage pipeline implementation. You choice is to predict taken or not taken. Assuming that you cannot change the pipeline, which would you chose? Why? b)
Background image of page 2
Image of page 3
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 09/22/2008 for the course CS 101 taught by Professor Prof. during the Spring '03 term at University of California, Berkeley.

Page1 / 7

fa96-quiz1 - Computer Science 252 Quiz #1 Name:_ Question...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online