final-2004-sol - Solutions to Final Exam Last name of...

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Solutions to Final Exam Last name of student Student ID number Assigned TA: First name of student Email address 5/3/2004 11:49 AM Do This First: 1. Make sure that you have all the pages of the exam book. 2. Fill in the above information. Exam Rules: 1. This is a 2 hour and 50 minute exam. 2. The syllabus includes all material covered in class during the semester. 3. This is an Open Book and Notes Exam. 4. You are not allowed to consult any other student. 5. You may use a calculator, but not a laptop, palmtop or other such computer. 6. Write your answers in the spaces provided. The last page is blank for work that does not need to be graded. 7. Use 2 10 for bytes, 10 3 for bits, i.e. 1KB = 2 10 Bytes, 1Kb = 10 3 bits, 1KB/sec = 2 10 Bytes/sec, 1Kb/sec = 10 3 bits/sec. Q1 (15 points) Q2 (15 points) Q3 (10 points) Q4 (15 points) Q5 (15 points) Q6 (10 points) Q7 (20 points) Total (100 points) Performance and Caching Virtual Memory Process Scheduling I/O Systems Computer Architecture System Calls, Process Synchronization Computer Networks ECSE-2660 Computer Architecture, Networks, and Operating Systems, Spring 2004 Page 1 of 16
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1. (15 points) Performance and Caching 1a. (6 points) For each of the following, based on the information of the processors, compare the performance of the machines given. Ignore cache, memory, disk and other such effects. Assume the instructions executed on each machine are the same. Circle the correct choices below. Processor CPI PPV604e 1.0 Uberchip 30 TurboSparc 1.0 UltraSparc II 2.5 Machine A vs Machine B i. 400Mhz PPC604e vs 200Mhz PPC604e a. A is faster than B b. B is faster than A c. Both are of same speed d. Cannot be determined ii. 10GHz Uberchip vs 300MHz PPC604e a. A is faster than B b. B is faster than A c. Both are of same speed d. Cannot be determined iii. 150MHz TurboSparc vs 375MHz UltraSparc II a. A is faster than B b. B is faster than A c. Both are of same speed d. Cannot be determined Grading: For each item, 1 point if correct, none otherwise. 1b. The YomThorpe processor has two levels of data caches with the characteristics shown below. You can also assume that it takes 50 clock cycles to request and complete a 32 byte transfer between the main memory and the L2 cache. L1 L2 Size 32KB 256KB Block size 8 bytes 32 bytes Associativity Direct mapped 4 way Hit time 1 cycle 19 cycles Miss rate 5% 2% i. (3 points) How many bits of a 32 bit main memory address would be used as the tag, index and offset fields, for each of the two caches above? Assuming the Data Memory is aligned by words, we have: L1: 32KB = 2^15 Bytes -> 15 bits of Cache Index Tag: 17 bits; Index: 12 bits; Block Offset: 1 bit; Byte Offset: 2 bits ECSE-2660 Computer Architecture, Networks, and Operating Systems, Spring 2004 Page 2 of 16
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L2: 256KB = 2^18 Bytes -> 18 bits of Cache Index Tag: 14 bits; Index: 13 bits; Block Offset: 3 bits; Byte Offset: 2 bits Grading: 1 point for each Cache level bit values, 0 otherwise.
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final-2004-sol - Solutions to Final Exam Last name of...

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