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Week of November 5

Week of November 5 - Class notes for the week of November...

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Class notes for the week of November 5 th Digital circuit input and output specifications: The voltage and timing characteristics we have measured in the lab, (V OH , V OL, V IH, V IL, t PLH, t PHL ) were all determined for one individual gate. The manufacturer’s published specifications will list these specifications for a statistical sample of their parts. For this reason, instead of just listing one value for a specification they will usually list a typical value and a ‘worst case’ value. As an example, a page from the TI’s datasheet for our 74LS00 NAND gate is presented below (data for the 54LS00 gate is provided on the same data sheet, this part is identical to the 74LS00 but has a wider operating temperature range). We have not discussed most of these specifications, but you will find entries for all the ones we have discussed. As an example, look at the entry for V IH in the recommended operating conditions table (the first table). Here they provide a minimum value of 2V, but no nominal or maximum

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U 4 A 7 4 L S 0 4 1 2 U 4 B 7 4 L S 0 4 3 4 U 4 C 7 4 L S 0 4 5 6 value. They are telling us that the circuit will work as described if the high logic level is at least 2V. The entry for V IL , on the other hand includes a maximum value of 0.8V but no minimum or nominal values. This means that the circuit will accept any input voltage less than 0.8V as a logic zero. The power supply voltage is shown as 4.75V (minimum) 5.0V (nominal) and 5.25V (maximum). You can assume that the circuit will work properly if you keep the power supply voltages in this range.
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