CSCE 3730 Programming Techonoligies and Architectures of FPLDs

CSCE 3730 Programming Techonoligies and Architectures of FPLDs

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Programming Technologies and Architectures of FPLDs 1 Programmable Switches Programmable switches are used for connections of wire segments in a FPLD. A FPLD may contain hundreds of thousands programmable switches. So they should - consume as little chip area as possible - have low ON resistance and very high OFF resistance - contribute low parasitic capacitance - be fabricated in a large number reliably 2
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Programming Technology How the logic cells and interconnect in a PLD are programmed depends on the programmable switch technology used. Programming technology may be permanent or non-permanent. For commerical FPGAs, the main switch technologies are (e.g. Actel) and Static RAM cells (e.g. Xilinx). For commerical CPLDs (e.g. Altera MAX), the main switch technologies are Erasable Programmable ROM (EPROM) transistors and Electrically Erasable PROM (EEP- ROM) transistors . 3 Antifuse Programming Technology An antifuse is the opposite of a regular fuse. It is an open path until a programming current is forced through it by applying a high programming voltage across it. Logic blocks are usually MUX-based. (Fig. 3-10, pp. 129)
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This note was uploaded on 09/30/2008 for the course CSCE 3730 taught by Professor Li during the Fall '08 term at North Texas.

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CSCE 3730 Programming Techonoligies and Architectures of FPLDs

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