CSCE 3612 ch3-1

CSCE 3612 ch3-1 - CPUs Input and output. Supervisor mode,...

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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. CPUs Input and output. Supervisor mode, exceptions, traps. Co-processors.
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. I/O devices Usually includes some non-digital  component. Typical digital interface to CPU: CPU status reg data reg mechanism
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Application: 8251 UART Universal asynchronous receiver  transmitter  ( UART ) : provides serial  communication. 8251 functions are integrated into  standard PC interface chip. Allows many communication parameters  to be programmed.
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Serial communication Characters are transmitted separately: time bit 0 bit 1 bit n-1 no char start stop ...
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Serial communication parameters Baud (bit) rate. Number of bits per character. Parity/no parity. Even/odd parity. Length of stop bit (1, 1.5, 2 bits).
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. 8251 CPU interface CPU 8251 status (8 bit) data (8 bit) serial port xmit/ rcv
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Programming I/O Two types of instructions can support I/O: special-purpose I/O instructions; memory-mapped load/store instructions. Intel x86 provides  in out  instructions.  Most other CPUs use memory-mapped I/ O. I/O instructions do not preclude memory- mapped I/O.
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. ARM memory-mapped I/O Define location for device: DEV1 EQU 0x1000 Read/write code: LDR r1,#DEV1 ; set up device adrs LDR r0,[r1] ; read DEV1 LDR r0,#8 ; set up value to write STR r0,[r1] ; write value to
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. SHARC memory mapped I/O Device must be in external memory space  (above 0x400000). Use DM to control access: I0 = 0x400000; M0 = 0; R1 = DM(I0,M0);
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Peek and poke Traditional HLL interfaces: int peek(char *location) { return *location; } void poke(char *location, char newval) { (*location) = newval; }
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Busy/wait output Simplest way to program device. Use instructions to test when device is ready. current_char = mystring; while (*current_char != ‘\0’) { poke(OUT_CHAR,*current_char); while (peek(OUT_STATUS) != 0); current_char++; }
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Simultaneous busy/wait input and output while (TRUE) { /* read */ while (peek(IN_STATUS) == 0); achar = (char)peek(IN_DATA); /* write */ poke(OUT_DATA,achar); poke(OUT_STATUS,1); while (peek(OUT_STATUS) != 0); }
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© 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed.
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CSCE 3612 ch3-1 - CPUs Input and output. Supervisor mode,...

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