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# HW1 - HOMEWORK#1 ECE 475/CS 4420 Computer Architecture Due...

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HOMEWORK #1 ECE 475/CS 4420 – Computer Architecture Due Thursday, September 25 at midnight Problem 1.1 Processor Cost [20 points] This exercise estimates the complete packaged cost of a microprocessor using the die cost equation and adding in packaging and testing costs. We begin with a short description of test cost and follow with a discussion of packaging issues. Testing is the second term of the chip cost equation: Cost of Integrated circuit = cost of die + cost of testing die + cost of packaging Final test yield Testing costs are determined by three components: Cost of testing die = Cost of testing per hour × Average die test time Die Yield Since bad dies are discarded, die yield is in the denominator in the equation – the good must shoulder the cost of testing those that fail. (In practice, a bad die may take less time to test, but this effect is small, since moving the probes on the die is a mechanical process that takes a large fraction of the time.) Testing costs about \$50 to \$500 per hour, depending on the tester needed. High-end designs with many high-speed pins require the more expensive testers. For higher-end microprocessors test time would run \$300 to \$500 per hour. Die tests take about 5 to 90 seconds on average, depending on the simplicity of the die and the provisions to reduce testing time included in the chip. The cost of a package depends on the material used, the number of pins, and the die area. The cost of the material used in the package is in part determined by the ability to dissipate heat generated by the die. For example, a plastic quad flat pack (PQFP) dissipating less than 1 W, with 208 or fewer pins, and containing a die up to 1 cm on a side costs \$2 in 2001. A ceramic pin grid array (PGA) can handle 300 to 600 pins and a larger die with more power, but it costs \$20 to \$60. In addition to the cost of the package itself is the cost of the labor to place a die in the package and then bond the pads to the pins, which adds from a few cents to a dollar or two to the cost. Some good dies are typically lost in the assembly process, thereby further reducing yield. For simplicity we assume the final test yield is 1.0; in practice it is at least 0.95. We also ignore the cost of the final packaged test. (a) For each of the microprocessors in Figure 1, compute the number of good chips you would th Edition). Assume a defect density of 0.5 defect per cm 2 , a wafer yield of 95%, and α = 4.

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(b) For each microprocessor in Figure 1, compute the cost per projected good die before
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HW1 - HOMEWORK#1 ECE 475/CS 4420 Computer Architecture Due...

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