L3.Pipelining_I___2_per_page

# L3.Pipelining_I___2_per_page - ECE475/ECE4420 Computer...

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1 ECE475/ECE4420 Computer Architecture L3: Pipelining Edward Suh C omputer S ystems L aboratory suh@csl.cornell.edu 2 ECE475/CS4420 — Computer Architecture, Fall 2008, Suh Announcement Lab1 will be released tomorrow Group of up to two CMS New URL is http://cscms.cit.cornell.edu Email ece475@csl.cornell.edu if you do not have access

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2 3 Roadmap Pipeline basics 5-stage pipelined in-order processor Pipeline hazards ECE475/CS4420 — Computer Architecture, Fall 2008, Suh 4 ECE475/CS4420 — Computer Architecture, Fall 2008, Suh Forget circuits… lets solve a “Real Problem” Device: Washer Function: Fill, Agitate, Spin Washer PD = 30 mins Device: Dryer Function: Heat, Spin Dryer PD = 60 mins INPUT: dirty laundry OUTPUT: 6 more weeks
3 5 ECE475/CS4420 — Computer Architecture, Fall 2008, Suh Step 1: Step 2: Total = Washer PD + Dryer PD = _________ mins One load at a time Everyone knows that the real reason that Cornell students put off doing laundry so long is not because they procrastinate, are lazy, or even have better things to do. The fact is, doing one load at a time is not smart. 6 ECE475/CS4420 — Computer Architecture, Fall 2008, Suh Doing N loads of laundry Here’s how they do laundry at other schools, the “combinational” way. Step 1: Step 2: Step 3: Step 4: Total = N*(Washer PD + Dryer PD ) = ____________ mins

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4 7 ECE475/CS4420 — Computer Architecture, Fall 2008, Suh Doing N Loads… the Cornell way Cornell students “pipeline” the laundry process. That’s why we wait! Step 1: Step 2: Step 3: Total = N * Max(Washer PD , Dryer PD ) = ____________ mins Actually, it’s more like N*60 + 30 if we account for the startup transient correctly. When doing pipeline analysis, we’re mostly interested in the “steady state” where we assume we have an infinite supply of inputs. 8 ECE475/CS4420 — Computer Architecture, Fall 2008, Suh Performance Measures Latency: The delay from when an input is established until the output associated with that input becomes valid. (Unpipelined Laundry = _________ mins) ( Cornell Laundry = _________ mins) Throughput: The rate of which inputs or outputs are processed. (Unpipelined Laundry = _________ outputs/min) ( Cornell Laundry = _________ outputs/min) Assuming that the wash is started as soon as possible and waits (wet) in the washer until dryer is available.
5 9 ECE475/CS4420 — Computer Architecture, Fall 2008, Suh Okay, back to circuits… F G H

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## This note was uploaded on 10/15/2008 for the course ECE 4750 taught by Professor Suh during the Fall '07 term at Cornell University (Engineering School).

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L3.Pipelining_I___2_per_page - ECE475/ECE4420 Computer...

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