L4.Pipelining_II_6pp

L4.Pipelining_II_6pp - Announcement Lab1 is released...

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1 ECE475/ECE4420 Computer Architecture L4: Advanced Issues in Pipelining Edward Suh C omputer S ystems L aboratory [email protected] 2 ECE475/CS4420 — Computer Architecture, Fal 2008, Suh Announcement Lab1 is released Start early we only have limited computing resources Reading: Appendix A.1 A.6 BRC (Big Red Chip) Contact info on blackboard Career Fair tomorrow 3 Roadmap Tricky issues in the 5-stage pipeline Handling exceptions Deeper pipeline More complex pipeline with multi-cycle operations ECE475/CS4420 — Computer Architecture, Fal 2008, Suh 4 ECE475/CS4420 — Computer Architecture, Fal 2008, Suh Exceptions Exceptions: interrupt instruction execution unexpectedly Common exceptions: I/O device interrupt OS system call Arithmetic overflow, FP anomaly Page fault Misaligned memory access Memory protection violation Illegal instruction Power / hardware failure 5 ECE475/CS4420 — Computer Architecture, Fal 2008, Suh A Taxonomy of Exceptions Synchronous vs. asynchronous User- vs. hardware-triggered Maskable vs. nonmaskable (NMI) 6 ECE475/CS4420 — Computer Architecture, Fal 2008, Suh A Taxonomy of Exceptions Within vs. between instructions Resume vs. terminate
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2 7 ECE475/CS4420 — Computer Architecture, Fal 2008, Suh Restartable Exceptions What do we need to do in order to resume after an exception? 8 ECE475/CS4420 — Computer Architecture, Fal 2008, Suh Precise Exception It must appear as if an interrupt is taken between two instructions (say I i and I i+1 ) • the effect of all instructions up to and including I i is totally complete
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This note was uploaded on 10/15/2008 for the course ECE 4750 taught by Professor Suh during the Fall '07 term at Cornell.

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L4.Pipelining_II_6pp - Announcement Lab1 is released...

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