lecture10

lecture10 - FoundationsofEmbeddedSystems ATermFall2008

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Foundations of Embedded Systems A Term -- Fall 2008 Lecture #10: More Clocks and Timers Reading for Today: User's Guide Ch. 13 Reading for Next Class: User's Guide Ch. 20 HW #3 (on web):            Due Friday 9/19/2008 Lab #1 (on web): Report due NOW! Lab #2 (on web): Report due Tuesday 9/30/2008 Last Class :  Clock inputs provide the Time Reference for microprocessor systems      >> FLL+ Clock Module:  Exercise in deciphering the 5 (yes,  five ) clock configuration              registers  MSP430F449 Clock System    >> MSP430 Clock module is very capable, wide variety of clocking options under              software control    >> FLL+ Clock module -- 3 possible Clock sources   LFXT1CLK = LF Crystal 32,768 Hz watch crystal   XT2CLK = 8MHz crystal   DCOCLK = Internal Digitally Controlled Oscillator (frequency selectable)   >>  Provides 4 clock signals to CPU and peripherals ( On Reset they   DEFAULT to the following ... know these!)    ACLK  = Auxillary Clock = LFXT1CLK =  32768 Hz    MCLK  = Master Clock (CPU) = 32*LFXT1CLK =  1.048567 MHz    SMCL K =  Sub-main Clock = DCOCLK =  
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This note was uploaded on 10/27/2008 for the course ECE 2801 taught by Professor Jarvis during the Fall '08 term at WPI.

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lecture10 - FoundationsofEmbeddedSystems ATermFall2008

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