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Lect15_notes - Foundations of Embedded Systems A Term Fall 2008 Lecture#15 Introduction to Serial Interfaces “a Reading for Today Articles User's

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Unformatted text preview: Foundations of Embedded Systems A Term Fall 2008 Lecture #15: Introduction to Serial Interfaces “a Reading for Today: Articles, User's Manual Ch 15 Reading for Next Class: User's Manual Ch 15, External Temp Sensor information Lab #2 (on web): HW #4 (on web): Due Tuesday 9/30/2008 (in class) Due Monday 9/29/08 Exam #2 — Tuesday 9/30/2008 -——_——_——_—_—_—_——__ Serial Interfaces — USART and SP1 Parallel Interfaces = Each bit has its own electrical connection (interconnect, trace, Wire) >> Advantages = Fast, easier to synchronize (1 clock edge transfers all bits together) See. 10w+ >> Used almost exclusively inside a CPU (or other) chip P43 6: Serial Interfaces — USART and SP1 Parallel Interfaces = Each bit has its own electrical connection (interconnect, trace, wire) The buses we‘v< used so (:awr', >> Advantages 2 Fast, easier to synchronize (1 clock edge transfers all bits together) Add r: 53 4’; lb n b Dccl‘k >> Used almost exclusively inside a CPU (or other) chip Eganplt’sj—wsiée MSPHBO gimp z? :37; CPU “\‘0 N\€m0(e§ been. +0 CPU In ~\ 3 ‘ *9 séa CPU > V236 r5 CALU\ >> Disadvantage = Each bit must have its own electrical connection =§Tme¥lixaevvl 'm ievms Oi: \FemieSiq‘lf §~o l4 r'x‘meeilC- LO‘a‘ L OAR—l- 5) No Space {or more. Plums gor pafovuel \n‘iel‘FCxCQs Q’klP => Even ‘\,\$‘\&Q R chip) lxm‘fil’aci Ab] I} by +0 (Mare.ch +RQ number of Lnifrconnecls “ (anger H Jigiqmces (awrsléc Mer boy» ' Propmj 0L4? OV\ ‘l" \OK-iencfl Serial Interfaces — Bits sent one after another along a single connection “ \ i *“_> /" ‘1 M fl 7 W \ - t \\ ‘- l t it" s t \/ ri- : Br} DJraultom _;l 1__l‘ M m El '5 "ll >> Used almost exclusively to make connections off-chip (and off-computer, through the Internet, out to the Mars Rover, etc) >> Advantages = Simpler/fewer connections between CPU and peripheral (2—4 lines) -">CLU\ 650 “'l:$r " Device Select (CS) I“ :> lep 3e led Sychronizing CLK (SCLK) 3) Usualln gram m) cVop/oceSSOr- Data Line(s) (SDI and SDO) : sefid balk I“ / 00+ (Tx / Rx} "I‘T><:—l*“‘m5""ll Rx = Reach“. Common ground (GND) :> M43 coin/eds be e8+ablisll€¢l '1?“ 5M“ \Dmr‘iwd‘l‘} >> “Connection” 2 PCB trace, wire, RF, acoustic, optical, etc. >> Dlsadvantages = Slower? more comphcated synchromzatlon, potential timing 1ssues @maJerA SQfla/O limks are ME93+_ U58 2-0 =>LHSO M\O‘,-\§ per SEC. => Fwatoxrc (IEEE Universal Synchronous/Asynchronous Receive Transmitter (USART) >> Basically acts as a parallel—to—serial and serial—to—parallel converter >> Most modern microprocessors/microcontrollers will have USART -- M P4 1 ‘ S has tWO 3) \\S‘\a‘y\ga\r<\’ + to“ I] >> Role of USART has grown with growing sophistication and speed of serial interfaces (SP1 and 12C to USB and others) >> MSP430F449 USARTs have 2 modes: UART and SP1 UART Mode (User's Guide Ch 14) >> UART mode configures basic 2—wire serial comms —> A 3 r\ aim mm 00 3 w\_, t L,” “W >> 12 external pins (URXD and UTXD) N 0 3k are A CAO ck , >> Not synchronous (no shared clock) ? >> To use serial communications both devices must know data format and baud rate .27: "b -—~—_ —— These are set using USARTs control registers fl " "‘MMM'WMWMWW‘V'W‘ —— lmplies make data format & baud rate decisions at design time \‘V/K\ A _ _,M .....= MN / Far Mat-1‘— 771/5 )5 msPc/so M4 RT’ Data Format —— Serial Communications Start Bit 2 1 bit (L00) Data Bits = 7 or 8 bits Parity 2 Even, Odd, or None >> Even Parity = 1 when number of 1's including parity is even >> Odd Parity = 1 when number of 1's including parity is odd Stop bit(s) = 1 or 2 bits (task) RS-232- “Old standby” for serial format 7; 56m i L 5 5 Qt rs ‘i \ CGquéd Sending Emit OXBC— 1 \OH “00 2,5v Q Even L5 B ___. _— PKTK‘LE) > :> Q\$O L$B ptrs‘t T‘ypicat Baud Rates and Errors Standard baud rate frequency data for UxBRx and UXMCTL are listed in Table 14—2 for a 32,768-Hz watch crystal (ACLK) and a twice! 1,048.576—Hz SMCLK. The receive error is the ammiated time versus the ideal scanning time in the middle of each bit The transmit error is the accumiated timing error versus the ideal time of the bit period. Tame t4—2. Commonly Used Baud Rates, 83w: Rate Data, and Errors ammam In... “m .- YX RX RX ‘ZX A UxER! L’XBRB UXMCTL EN“); EN? Emr‘é UXSR? UXSQSC} UXMCTL Ei'mr‘f. nun m n . -nu -nun -nmm -nm W\g 3i‘6x\.>\€ gives UAQT Cap/viral reg‘gifl’ «’8/ ital}; por- vocrious \DQUA VQ4€S Example: How long would it take to transmit the true—ism “2801 IS FUN” at 9600 baud with 1 start bit 1 stop bit and even parity? =,‘> Each chatvacler (quince // his :3 And. I‘Mv-Qlt'; Cure, OkaVaL~leys ZALJUJtMS 594.663 QW‘lS/wryn cm): ; mam 3 03900 \OQS Serial Peripheral Interface Bus (SPI) ( U ser ‘5 Manual Ch l5) >> Used primarily for synchronous serial comms between a CPU and peripherals “within the box” \ C le S e. \O a. 4 i —— Synchronous = shared clock 0 n W P f) ' __../‘ :>Clocl< Suopliti btj VViqSi‘fY' >> Usually a 4 wire connection (some times 3 wire) SIMO = Slave In/Master Out data line SOMI = Slave Out/ Master In data SCLK = Serial Clock (UCLK in MSP430 USART) CS 2 Chip Select >> SP1 Loose standard (close to Microwire) —- Different from PC (In lav. __ IQ COM MOI“ Q_CJ.‘(-\on\ :>0\r\o‘H\€.v‘ \\s\v\0r‘l‘ howl" \mfilxer device ) (Mule. S€ricJ lmh =>uk< STAY) ’I‘c. weal M5338 “We. look W .7 MSPHBOquq does “0+ Sup Port E‘C >> To use SPI the programmermust... MSW-$0 USA RT Com ran \h «stanchronous “UH-RT" “4034 or 1) Enable USART for SP1 mode m 5‘1V‘U’W0" 00 b 5 PI m 08 e 2:) Select data format 3) Setup synchronous clock $14K“ C SPI VOid setuPSPIwoid) //‘rkxs (SHAW sds-up U ‘¢ 0' { MEl |= USPIEO; // Enable USARTO SPI mode UOCTL &= ~SWRST; // Make sure SW RESET bit is off // Bits 3, 2 & 1 are used for SPI UCLK, SOMI and SIMO K)» P3SEL |= BIT3|BIT2|BIT1; // set bits to Function modezl L2) UOCTL |= CHAR + SYNC + M; // USARTO module control // CHAR = 1 => 8—bit data _ + //> SYNC 1 => SPI mode 33%“ A44“ // M = 1 > master mode ‘pofmad UOTCTL I= SSELO+SSEL1+STC+CKPL; // USARTO xmit control // SSELO = 1 & SSELl = 1 // (SMCLK for baud—rate gen.) 39:15 up // STC = 1 => 3-pin SPI mode . 3 , C5} // CKPL = Invert Clock md‘mw” UOBRO = 0x02; // Divide SMCLK by 2 => SCLK CLK UOBRl = 0X00; ‘ UOMCTL = 0x00; // Modulation control — not used. // Ensure all these bits are reset v UOTXBUF = 0x00; //C1r transmit buffer Dam Padre—45:2“ Egg—‘3 } Check specs 01C 3?: device +0 See Ci\\owq,E/e SCLK mules (52g ka5 [3 "reasonable" rock) pm— SPT— \Xn K 1% (Ll) 88/604 736(1thch List/15 3+5 Clan) Seipg‘l {CS} First, what is the function of a CS? >> Likely to be multiple peripherals using SPI bus >> Only 1 Slave device and Master (MSP430) can use SP1 bus at a time N >> CS is typically ACTIVE LOW digital signal D -. 51 in \ g3 CS = 0 = Device is Enabled (will read and write to SP1 data lines) CS = 1: Device is Disabled (outputs are high Z) __ 314ch l— W” I swez 3 b‘ig‘lafl 1/0 pins Owe ugecl +0 genera—R ~ * * le 4* SP]: cs0) C33.) Q52 *0 58 a OKMOncs 3 I d€vififs >> The MSP430 Interface Board has 2 peripherals that are SPI devices — the external temgerature sensor and the digital to analog converter. \___..——. N R Configuring the CS for the External Temperature Sensor >> Check schematic to see how the temperature sensor's CS is connected 3.3 U C§3> On (Pol‘ll (ptfl/‘I MSP43GF449 // Configure a CS signal (active low) for temp sensor 0000 #define tempCS 0x10 // Temp sensor CS on Pin 4 => 000' PISEL &=44(tempCS); // Select P1.4 digital IO for TC77 cs PlDIR |= tempcs; // Set cs bit as an output P10UT |= tempCS; // De—assert cs (set cs =1) Next program should... 5) Send or Receive data -- Poll transfer complete bits to determine when data transfer complete (interrupts not enabled here... they could be) ...
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This note was uploaded on 10/27/2008 for the course ECE 2801 taught by Professor Jarvis during the Fall '08 term at WPI.

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Lect15_notes - Foundations of Embedded Systems A Term Fall 2008 Lecture#15 Introduction to Serial Interfaces “a Reading for Today Articles User's

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