Test 2 Spring 2008 Solutions

Test 2 Spring 2008 Solutions - 1 ECE331 Microcomputers...

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Unformatted text preview: 1 ECE331 Microcomputers (KEH) May 15, 2008 Test #2 -— 100 Points Maximum (2 periods Max) Open Textbook and Microcontroller Interfacing Topics Notes Dept. of Electrical and Computer Engineering Rose-Hulman Institute of Technology Name: .959 l O V" CM Box: 1) (28 Points, 2 points per blank) Assembly Language Program: Interrupt-driven White Noise Generator The hardwired circuit shown below in Figure P1 is a 31-bit right-shift register consisting of D flip-flops FFO — FF30, whose input is formed by EXCLUSIVE OR-ing the outputs of FF2 and FF30. This sequence generator produces a “maximum length” pseudorandom binary sequence (PRBS) that will not repeat until 231-1 clock pulses have elapsed. The system output may be taken from the output of any flip- flop in the shift register. The (normally closed) PRESET pushbutton is used to start the shift register in the state of all 1’s, since the state of all 0’s is the one state that is n_ot allowed in a maximal length pseudorandom binary sequence generator, and so we must not let this circuit start in the all 0’s state. When clocked at 20 kHz, the sequence will take (231—1)/20000/60/6O = 29.8 hours to repeat itself! Thus the binary output is a rather random sequence of 0’s and 1’s! If this circuit drives a loudspeaker, it will produce white noise that might be used as a sleep aid. PRBS Sequence Generator (Length = 2A3] - I) Must be started by hitting preset button since initial state may NOT be 0. FF2 (31 D FlipFlops Total) 10 kohm PR ESET SW g l Clock Oscillato Figure P1. Pseudorandom Binary Sequence Generator Below is an assembly-language program written for a Freescale 9812C32 (specifically for our CSM12C32 module) that emulates this hardwired white noise generator in software as an interrupt routine. The calling program sets up the RTI interrupt to interrupt at a 15.625 kHz rate (instead of the 20 kHz in the hardware circuit above), and it also enables interrupts before it falls into an idle loop. The interrupt routine implements the rest of the system shown in Fig. Pl. Note that this software emulation should behave exactl like the hardware svstem in F i . PI exce tit is clocked at a 15.625 kH instead 0 20 kHz. Please note that this program is intended to run on our CSM12C32 lab modules, and that these modules employ a 16 MHz ceramic resonator, which sets the OSCCLK rate to 16 MHz. Note from Fig. 6.15 in 2 the Huang Text that OSCCLK has nothing to do with the PLL that forms the bus clock, thus the RTI interrupt rate does NOT depend upon the bus clock rate, as set by the PLL. Each RTI interrupt corresponds to a single clock pulse in the hardwired circuit of Fig. Pl. Note that four byte—sized variables (SHR3, SHR2, SHRI, and SHRO) are used to implement the 31-bit shift register, where SHR3 represents FFO ~ FF7; SHR2 represents FF8 — FF 15; etc. The system output is taken from FF30, and is driven out on 1/0 pin PMO. If a loudspeaker is connected to PMO, we will hear the broadband white noise as a steady “hiss”. Fill in the missing blanks in this assembly-language program. ; ECE331 White Noise ; PRBS.ASM — Generates 2A31—l bit long PRBS (pseudorandom binary ; sequence with a 15.625 kHz clock rate). Uses RTI interrupt. XDEF WHITENOISE ABSENTRY WHITENOISE INCLUDE 'mc9512c32.inc' ORG $800 SHR3: ds.b 1 SHRZ: ds.b l SHRl: ds.b 1 SHRO: dS.b l TEMP: dS.b l ORG $4000 WHITENOISE: lds #SlOOO bset DDRM,l bclr PTM,l ;Next two lines simulate depression of PRESET SW in Fig. P1 ;***BLANK #1 HM movw f23 momma: I m W w %W _ _ F__’___.___., ;D1V1de 16MHZ OSCCLK to get . ;RTI interrupts at 15.625 Hz rate (Text Tabledé.4 and Text Fig. 6.12) V filcza 871 TL. ;*** **** mo b C 33E We 6.” bset £80 ;* *BLANK #4 **** movb #$80,CRGFLG ;C1ear RTI interrupt flag QL; ;***BLA.NK #5 HM loop_here‘foreverz bra loop_here_forever ;*********Here ends the main program "WHITENOISE" WHITENOISEISR: CLR TEMP BRCLR SHR3,%OOlOOOOO,FF2NOTSET MOVB #1,TEMP FFZNOTSET: CLRA . BRCLR smug}? FFSDQ DTSET;***BLANK #5 u” LDAA #1 FF3ONOTSET: icing 'TEP1P ;***BLANK #7 **** f1) RQRA Lon» 1—283 7 3512A) ;***BLANK #8 **** ROR SHR3 ROR SHR2 ROR SHRl ROR SHRO ldaa saga ,Hmmux #9 NH 1308A. (it-SBA; 319m) ;***BLANK #10 MM STAA PTM ;Send Bit #BOout to 53&0 ;Relax the RTI interrupt flag movb fi‘ 809 cgg-fLG ;***BLANK #11 “H 83:]; -***BLANK #12 **** ************~k**~k* ’***‘k****‘k*‘k*************‘k********** * ;* Initialize Reset Vector and errupt Vector * 0125 6X1fi3r’ ” .‘1'**‘k‘k**‘k*‘k***‘k*******‘k*********** * ************************* i I ‘ ORG $FFFE dc.w WHITENOISE ;Make reset vector point to ;entry point of WHITENOISE program ORG EFEQ ' ;***BLANK #13 **** dc.w 13H gtEMngIS‘R ;***BL.ANK #14 **** LcoK (LE / FPOM 65 I (“J “(Theer “r / 2) LCD Multiplexing (14 points) " - 2 23 ) 1m Thcflgqc a. (1 pts) A custom LCD display for a new product has 127 segments that must be individually controlled (turned on or off). If we Choose to use M1 multiplexing on this display, implying 4 back plane signals are needed, what is the total number of wires (back plane wires plus front plane wires) that must be connected to this display? #Fp; :- ,—-—:3}3/‘-I =32 , Total #Wires = 3 6 4r 8?; = ‘4 32M = b. (1 pt) Repeat Part A for 1/3 multiplexing. Total # Wires = ‘7' 6 13:1 :42'/3=“I3 #BP’=3 #FPy/3 3 3 c. (1 pt) Repeat Part A for 1/10 multiplexing. Total # Wires : Q 3 12"] , ,_ v /_ N +£ V0 mu“? |Q # FPSI; --’- ; I2a7 — I3 isst ._ [of rSONM’ mu), avgamgw‘ewtgxgnfl to I3+ lo 2123i This nwvxber op .S‘e Mn+y9Q$ d. (2 pts) For the case of 1/3 LCD multiplexing, there are 3 back plane signals, P1, BP2, BP3 Assume that Vcc = 5 V, so the waveform voltage levels are 5 V, 3.333 V, 1.666 V, and Sketch one frame of each of the three backplane signals. 5V' (:ri;;;:”;;—;é: 815$ TffcdreJ t make: +5+J#WR‘VFQI’ 9V (nurse. J! 0V 2 e. (2 pts) Sketch one frame of a single front plane signal, FPl, where the segments that pass over BPI, BP3 are to be ON, and the segment that passes over BP2 is to be OFF. Vse3m f. (2 pts) Sketch one frame of the voltage waveform Vsegl 1, which represents the voltage across the “turned on” segment that lies between BPl and FPl. (Vsegn = BPl voltage ~ FPI voltage). Use the PM voltage waveform from Part e above. BFI'FF\ 5V 0V w5V g. (2 pts) Sketch one frame of the voltage across the “turned off” and FPl, Vsegzl. (Vsegzt Part e above 2: 8‘7Z‘F Pt 5V segment that lies between BP2 = BP2 voltage — FPl voltage). Use the FPl voltage waveform from 0V 65,56”) : RMS {Gee—20mg = [(93):] z 5 h. (2 pts) For the case of 1/3 LCD multiplexing, find the RMS value of the Vsegn waveform, which corresponds to the waveform of a turned 95 segment, and also the RMS value of the Vseggl voltage waveform, which corresponds to a turned QEE segment. Hint: Recall that in the class notes, it was shown ( in Figure 7.21) that for the case of“: multiplexing, the RMS voltage across a segment that is UN is Vrmson = 2.899 V,rms; and the RMS voltage across a segment that is OFF is Vrmsofi‘ = 1.67 V, rms. Show your calculations in the space below. »—~—”1 l __2 2_ :[b ("r/sweeten = sue/vim. I» V)Y‘I’V\f RMS value of Vsegll = 3a (cl I V,rms RMS value of Vseg21 = I. 66 2 V,rms F. (1 pt) Based upon comparing the results for 111 and 1/3 multiplexing, (a) which multiplexing method requires fewer connections? ’ :13 4v srnce 3..un >2,g<ryv (b) which multiplexing method yields higher contrast? 3) (5 pts) A power NPN BJ T with beta = 100 is used to switch a 10 ohm, 20 V resistive load using the upper left circuit of Slide #57. (Assume Vbe(on) = 0.7 V and Vce(sat) = O V.) (a) (4 pts) What is the maximum permissible value of Rb? +5V RL {20V :DM [DJ‘L 4..) : :6 i loc (b) (l) pr much current must the open—collector driving gate be able to sink? (Assume Vcesat = 0V.) Rb5v (was? Ell/0V I j; W 3 anlémA stnkr Q‘EJl 4) 5) (4 points) Imagine that the 10 ohm resistive load of Problem 3 is replaced by an inductive load that may be modeled as a 1.0 H inductance and a 10 ohm resistance. How long would it take (assuming that the open—collector driving gate output voltage has been LOW for a long time, and then it suddenly rises HIGH. How long after that will the load current reach 90% of its final value (1.8 Amperes)? You might regard this as the load “turn-on” time. I; :: o A 1‘: 3 29; :2A 20V o (Ofl' . “e. - «L =1 “(I-27:- -2 -m- +5'v l :H “II/LL L F c JG: 2,, 4,131-0.” Rb I I0 ' —-Ioi: Lem viot $ t x . 1 (I __ e x) :: o.9(2A)=I.8H ,2 2:50 (12 pts) Imagine that the driving gate output voltage of the circuit in Problem 4 is suddenly changed from HIGH to LOW. a) (2) What serious problem will occur? (Explain using VL = LdiL/dt) XL 00 Mead-Hue \ro HTLSQ SFFKQ 0;ch0: rm 1 series batik i)th Amway/ca; own-9. ‘i‘Lfig-L m Bum: ctr-t BJT,’ b) (2) Redraw the circuit showing how a single fast—acting diode may be added to this circuit to solve \ the problem of Part 5(2a). DOW BTT O N) Cu “(9‘1 ‘5 FF a” ’K' J .3- “N “W “mascara REL. (03L ’LL A L Circulatler “HW‘exkgk cQIetLQ— Mh'l‘fxe ‘- Cuvwavx'l‘ QUSJ‘FfCU‘QL‘ 3mm . c) (4) For the circuit of 5(b), determine how long it will take for the load current to decay from its full value down to 10% of this value (0.2 A). You might regard this as the “load turn off time”. d) (2) How could you make this turn off time faster? Redraw the circuit showing how one additional resistor “Rspeedup” might be added, so the load will turns off faster, without affecting the load current of the load turn—on time. L RL + Rspeelgup New ,1, : e) (2) What is the problem if you make Rspeedup too large? As usual, ther is an engineering tradeoff.‘ .Ihf'l'l‘aJl cuvmd' Tbmcxflk RSPQ Q ., IF Rs {abet F ‘ P 5° I ‘7“ W39 ) v16»: ~2A (Rypeeéup) = [35% 9 BIT Yntk 34-.“ be in An e» o5 Blowing Qu’tl (u) “dw- 7 (8 pts) Using only rising-edge sensitive D flip—flops (with D, CLK, CLR, Q and Q\ pins) and assorted inverters and logic gates, design a circuit that will derive the 2x resolution CW output waveform shown in Fig. 6 from the A and B input waveforms. (See arrow below) YOU NEED NOT DERIVE THE CCW output waveform. Be sure to label you ’re A and B inguts and your CW ougzgut. Forward (CW) Reverse (CCW) 23206 A """"""""" ,,,,,,,,,,,,,, """""""" " ............... " """ "' A if; flavor"! i,_. 1—— 3 W B I ............ “L INDEX i“; AULJLJLJLJLJLILIL 1X 3 gm cow ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, t 'NDEXrl fiflh a, a _____ a Fig 5. Incremental encoderdisktrackpatterns 0116 CW ,,,,, VVVVVVV ..... .l _ M CCW 2X l I“ w w .... 1 s i W o _ _ w N . N .. . ” 4X """"""" ””””” E17“. ””””””” ” CCW , . J [J Hill Jllllil UL Fig 5, Quadrature direction sensing and resolution enhancement. (CW = clockwise, CCW= counter—clockwise) 6) Stepping Motor (8 points) Referring to the stepping motor circuit diagram shown in the course notes (Slide #68), imagine that the two bottom rows of 7407/7406 inverters are removed, leaving us with just one row of 2N6427 power Darlington transistors. Then imagine that a microcontroller has PT M3 connected to the base of the left- most power Darlington, PTM2 to the next one, PT M1 to the next, and finally PTMO to the right-most power Darlington. a. (2 pts) List the sequence of eight 4-bit numbers that would have to be output on the low 4 bits of PORT M (in the order PTM3:PTM2:PTM1:PTMO) in order to make the magnetic field vector developed by the stepping motor step in the clockwise (CW) direction, with 8 steps per revolution (45 degrees per step). Let your first number correspond to the magnetic field pointing directly up. (Hint: you may turn on either 1 or 2 coils at a time.) cool 00”, 00W ,DHO otoo “00,1000, tool b. (4 pts) Assuming a permanent magnet rotor with 7 permanent magnet poles (instead of the rotor with 3 permanent magnet poles considered on Slide #69 in the lecture notes), determine the number of steps per revolution of the shaft using the 8-value sequence of Part A. Do this by drawing, in the space provided below, the 7-pole rotor (showing only the south poles) with one of the 7 poles aligned with the initial B field. Then when the B field steps 45 degrees to its next position, determine which south pole is closest to the new position of the B field, and hence is pulled into alignment. Determine the angle through which the shaft rotates, and determine its direction (CW or CCW). a V Degrees of Shaft Angle Rotation Per Step 2 (0 d H 29 Step Direction = Cc W 3:00! c. (1 pt) What is the best name for the four lN400l power diodes in this stepping motor circuit? ( ircle one) éransient voltage suppression diodes 2. turn—on speedup diodes 3. tum—off speedup diodes 4. load current limiter diodes d. (1 pt) What is the best name for the purpose of the 22—ohm resistor in this stepping motor circuit? (circle one) 1. turn-on speedup resistor @um—off speedup resistor 3. load current limiter 4. voltage transient suppresston resistor 7) (2 pt) A magnetic reed switch will be most sensitive to an applied magnetic field (B) that is oriented in a direction that is 1. perpendicular to the reeds @parallel to the reeds 3. at a 45 degree angle to the reeds 8) (2 pt) What is the purpose of the diodes in the 8 x 8 scanned keyswitch matrix discussed in the course notes? @hort—circuit protection 2. over—voltage protection 3. speed up key seaming process 9) (7 pts) Imagine that a “poor man’s A/D” circuit implemented in the C language is used to sense the value of a variable resistor Rx by connecting Rx between PTO and Vcc = 5.0 V and a 0.47 uF capacitor between PTO and ground. Assume that PTO has a logic high threshold of 3.00 V. If PTO is driven low (to O V) for several seconds, and then suddenly released (allowed to float), the time elapsed before a logic 1 is read on PTO is 3.5 ms. . CPu A. (4 pts) Flnd the value of Rx. S'V " 0.47 F'Ex) , -3.5m§ PTO Q'QV ‘ 5C1 - e ©»H’}«F-Rx ICW'WAF 2? R); f» 3,227 hfi’ B. (1 pts) How should the LSB of the PERT register be set in order to obtain the most accurate measurement of Rx? Explain your reasoning. O (Cflflil’aie ln‘l‘Qma-Q pullup) Iii/ice wQ cac NOT C. (1 pts) How would you set the LSB’s of the Port T data register and the Port T data direction register in order to drive PTO to 0 V? Port taaxtctp = o ( Set claim Hi to “0 ') PaV‘i'T, GQCQV‘,O 21‘ I ('a‘rwe dosh; “O” ou‘l‘ on PTSZ PM) D. (1 pts) How would you set the LSB’s of the Port T data register and the PORT T data direction register in order to release (float) PTO? Pow+7:&oc‘fcx,0 = )4 (Jinn/2L (0312—) Pcw‘l’ T, (QOQV_O : O (Flom‘i’ PTO) 10 10) (10 pts) UPC Bar Code (Used on groceries and many other consumer products, but NOT on books!) a. (3 pts) Using the UPC encoding table found in the notes, determine the six encoded UPC digits in the left half of the bar code. Recall that Black = 1, White = 0; there are 3 SYNC patterns: 101 at each end, and 01010 in the middle. (Hint: first make sure you can successfully decode the six left digits in the example UPC code in the notes, or on any grocery product in your home.) 6 r; ' e :2 5 * o “a sync. g/W‘COCIB I b. (3 pts) Recalling that the UPC encoding table found in the. otes must have its black and white regions exchanged for the right half of the UPC cor. e, determine the six encoded UPC digits in the right half of the bar code. (Hint: first make s re you can successfully decode the six right digits in the example UPC code in the notes, or n any grocery product in your home.) G c. (4 pts) The last (rightmost) digit you found in Part (b) is the UPC—A checksum digit. Int 6 space below, show the step—by-step calculation of this checksum digit from the other preceding 11 digits. Your results must match the 12th digit you decoded above. Ghee/Mum : tea—[awfng +7+2 +>‘)+ (7+/ +4 +31% ) 10*7 3E 9 70/0 ll “3 [0»- (377010 ...
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Test 2 Spring 2008 Solutions - 1 ECE331 Microcomputers...

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