# cse331-week5 - CSE 331 Computer Organization and Design...

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CSE331 W05.1 KB-Fall 2008PSU CSE 331 Computer Organization and Design Fall 2008 Week 5 Course material on ANGEL: cms.psu.edu [Many thanks to Mary Jane Irwin adapted from D. Patterson slides ]

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CSE331 W05.2 KB-Fall 2008PSU Head’s Up Last week’s material Supporting procedure calls and returns; addressing modes This week’s material Assemblers, linkers and loaders - Reading assignment - PH: 2.10, A.1-A.5 Next week’s material (after Exam #1) Introduction to VHDL and basic VHDL constructs - Reading assignment – Y, Chapters 1 through 3 Reminders HW 4 is due October 3 (by 11:55pm) Quiz 3 is due (by 11:55pm)
CSE331 W05.3 KB-Fall 2008PSU Review: Addressing Modes Illustrated 1. Register addressing op rs rt rd funct Register word operand 3. Immediate addressing op rs rt operand 4. PC-relative addressing op rs rt offset Program Counter (PC) Memory branch destination instruction 5. Pseudo-direct addressing op jump address Program Counter (PC) Memory jump destination instruction || op rs rt offset 2. Base addressing base register Memory word or byte operand

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CSE331 W05.4 KB-Fall 2008PSU Review: MIPS Instructions, so far Category Instr OpC Example Meaning Arithmetic (R & I format) add add \$s1, \$s2, \$s3 \$s1 = \$s2 + \$s3 subtract sub \$s1, \$s2, \$s3 \$s1 = \$s2 - \$s3 add immediate 8 addi \$s1, \$s2, 4 \$s1 = \$s2 + 4 shift left logical sll \$s1, \$s2, 4 \$s1 = \$s2 << 4 shift right logical srl \$s1, \$s2, 4 \$s1 = \$s2 >> 4 (fill with zeros) shift right arithmetic sra \$s1, \$s2, 4 \$s1 = \$s2 >> 4 (fill with sign bit) and and \$s1, \$s2, \$s3 or or \$s1, \$s2, \$s3 \$s1 = \$s2 | \$s3 nor nor \$s1, \$s2, \$s3 \$s1 = not (\$s2 | \$s3) and immediate c andi \$s1, \$s2, ff00 or immediate d ori \$s1, \$s2, ff00 \$s1 = \$s2 | 0xff00 load upper immediate f lui \$s1, 0xffff \$s1 = 0xffff0000
CSE331 W05.5 KB-Fall 2008PSU Review: MIPS Instructions, so far Category Instr OpC Example Meaning Data transfer (I format) load word 23 lw \$s1, 100(\$s2) \$s1 = Memory(\$s2+100) store word 2b sw \$s1, 100(\$s2) Memory(\$s2+100) = \$s1 load byte 20 lb \$s1, 101(\$s2) \$s1 = Memory(\$s2+101) store byte 28 sb \$s1, 101(\$s2) Memory(\$s2+101) = \$s1 load half

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## This note was uploaded on 11/03/2008 for the course CMPEN 331 taught by Professor Bhat during the Fall '08 term at Pennsylvania State University, University Park.

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cse331-week5 - CSE 331 Computer Organization and Design...

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