Lab2903_3 - DIGITAL DESIGN I: EXPERIMENT #3 COMBINATIONAL...

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DIGITAL DESIGN I: EXPERIMENT #3 COMBINATIONAL LOGIC DESIGN USING K-MAPS AND SSI IMPLEMENTATION Purpose The purpose of this experiment is to design a minimized combinational logic circuit using a K-map and Boolean algebra. You will then use Altera’s Quartus II software to implement and simulate your design to ensure its correctness; and will then implement and test your design in hardware using SSI chips and a breadboard. References 1) Digital Systems: Principles and Applications, Chapter 3 and 4 2) Altera Quartus II Tutorial 3) Chip Pinout Diagrams Materials Required Assorted SSI components, breadboard, and 5V power supply. Discussion A combinational logic circuit is to be designed to implement the multi-function gate depicted below. X and Y are the select inputs that choose one of the three functions to implement; A and B are the function data inputs. For example, if X = 0 and Y = 0, the selected function is AND; so F = A AND B in this case.
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This note was uploaded on 11/20/2008 for the course ELEG 2903 taught by Professor Smith during the Fall '08 term at Arkansas.

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Lab2903_3 - DIGITAL DESIGN I: EXPERIMENT #3 COMBINATIONAL...

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