Lab2903_5 - DIGITAL DESIGN I: EXPERIMENT #5 7-SEGMENT...

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DIGITAL DESIGN I: EXPERIMENT #5 7-SEGMENT DISPLAY DESIGN Purpose The purpose of this experiment is to learn how to display a 4-bit binary number in hexadecimal form on a 7-segment display on the Altera DE2 FPGA board. References 1) Digital Systems: Principles and Applications, Chapter 4 and 9 2) Altera Quartus II Tutorial 3) DE2 Pin Assignments Materials Required Altera DE2 board, AC adapter, and USB interface cable Background The figures below show the 7-Segment display and how the display should look when displaying numbers from 0 through 15. The truth table should have N(3:0) , the 4-bit binary number, as its inputs and A , B , C , D , E , F , G , the seven segments of the display, as its outputs. The segments of the display are Active-low, which means if the segment is fed a logic low state (i.e., Logic 0 or 0V) it lights up in red. The DP segment of the display should not be used for this lab. Also, an example of how the truth table should look is shown below for two examples inputs. Your truth table needs all 16 input combinations.
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This note was uploaded on 11/20/2008 for the course ELEG 2903 taught by Professor Smith during the Fall '08 term at Arkansas.

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Lab2903_5 - DIGITAL DESIGN I: EXPERIMENT #5 7-SEGMENT...

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