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Unformatted text preview: the Carry flag. (rD) (rA)[ 0] (rD)[1:31] (rA)[0:30] MSR[C] (rA) Shift Right Logical: Shifts logically the contents of register rA, one bit to the right, and places the result in rD. A zero is shifted in the shift chain and placed in the most significant bit of rD. The least significant bit coming out of the shift chain is placed in the Carry flag. (rD) 0 (rD)[1:31] (rA)[0:30] MSR[C] (rA)...
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This note was uploaded on 03/19/2008 for the course ECE 3534 taught by Professor Alabbott during the Fall '07 term at Virginia Tech.
- Fall '07