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62sequential - Overview 6.2 Sequential Circuits Last...

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COS126: General Computer Science http://www.cs.Princeton.EDU/~cos126 6.2: Sequential Circuits Q S R 2 Overview Last lecture: Boolean logic and combinational circuits. ! Basic abstraction = controlled switch. ! In principle, can build TOY computer with a combinational circuit. 255 ! 16 = 4,080 inputs " 2 4080 rows in truth table! no simple pattern each circuit element used at most once This lecture: reuse circuit elements by storing bits in "memory." Next lecture: glue components together to make TOY computer. ALU combinational Memory state 3 Sequential vs. Combinational Circuits Combinational circuits. ! Output determined solely by inputs. ! Can draw solely with left-to-right signal paths. Sequential circuits. ! Output determined by inputs AND previous outputs. ! Feedback loop. Q S R 4 Flip-Flop Flip-flop. ! A small and useful sequential circuit. ! Abstraction that "remembers" one bit. ! Basis of important computer components: memory counter We will consider several flavors.
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5 SR Flip-Flop What is the value of Q if: ! S = 1 and R = 0 ? " Q S R 1 0 1 Q is surely 1 6 SR Flip-Flop What is the value of Q if: ! S = 1 and R = 0 ? " Q is surely 1. ! S = 0 and R = 1 ? " Q S R 0 1 Q is surely 0 0 0 0 7 Q S R 0 0 Q is possibly 0 0 0 0 SR Flip-Flop What is the value of Q if: ! S = 1 and R = 0 ? " Q is surely 1. ! S = 0 and R = 1 ? " Q is surely 0. ! S = 0 and R = 0 ? " 8 SR Flip-Flop What is the value of Q if: ! S = 1 and R = 0 ? " Q is surely 1. ! S = 0 and R = 1 ? " Q is surely 0. ! S = 0 and R = 0 ? " Q is possibly 0 . . . Q S R 0 0 or possibly 1 ! 1 1 1 1
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9 Q S R 0 0 SR Flip-Flop What is the value of Q if: ! S = 1 and R = 0 ? " Q is surely 1. ! S = 0 and R = 1 ? " Q is surely 0. ! S = 0 and R = 0 ? " Q is possibly 0 . . . or possibly 1. While S = R = 0 , Q remembers what it was the last time S or R was 1. old Q 10 SR Flip-Flop SR Flip-Flop. ! S = 1, R = 0 (set) " “Flips” bit on. ! S = 0, R = 1 (reset) " “Flops” bit off. ! S = R = 0 " Status quo. ! S = R = 1 " Not allowed. Interface Implementation S R SR flip flop Q Q S R 11 Truth Table and Timing Diagram Truth table. ! Values vary over time. ! S(t), R(t), Q(t) denote value at time t. Sample timing diagram for SR flip-flop. Q(t+ # ) SR Flip Flop Truth Table S(t) 0 0 1 0 0 0 0 0 R(t) 0 0 1 1 Q(t) 0 1 0 1 1 1 1 1 1 1 0 0 1 1 0 1 0 1 Q R S time 1 0 1 0 1 0 # # 12 Clock Clock.
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