Basic Structure of Computers

Basic Structure of - CS 264 Part 0 How Computers Work CPU Arithmetic/Logic Unit Control Unit Memory I/O Input Output Basic Functional Units of a

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CS 264 Part 0
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How Computers Work
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Arithmetic/Logic Unit Input Memory Control Unit Output CPU I/O Basic Functional Units of a Computer
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Memory instructions data data data data instructions instructions instructions instructions data data
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Memory CPU instructions data ?
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Arithmetic/Logic Unit Memory Control Unit CPU instructions data
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Arithmetic/Logic Unit Memory Control Unit CPU 10110101111 10110101111 (it will be “executed”) (it will be “computed”)
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The “fetch-execute cycle” Fetch the instruction whose address is in the program counter Increment the PC so it holds the address of the next instruction Execute the instruction just fetched Fetch the next instruction Etc.
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Arithmetic/Logic Unit Memory Control Unit Instruction Register Program Counter Data Register Data Register instruction instruction fetch
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Arithmetic/Logic Unit Memory Control Unit Instruction Register Program Counter Data Register Data Register data instruction execute data
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Arithmetic/Logic Unit Memory Control Unit Instruction Register 2482 Data Register Data Register 04 3300 4102 instruction fetch 2482 “Add A to B”
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Arithmetic/Logic Unit Memory Control Unit 04 3300 4102 2486 Data Register Data Register 04 3300 4102 instruction fetched and PC incremented 2482
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Arithmetic/Logic Unit Memory Control Unit Add A to B 2486 Data Register Data Register 04 3300 4102 instruction decoded 2482
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Arithmetic/Logic Unit Memory Control Unit Add A to B 2486 16 31 16 execute-- load operands 31 data fetch B data fetch A IR B (4102) A (3300)
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Arithmetic/Logic Unit Memory Control Unit Add A to B 2486 16 31 16 execute-- add operands 31 + IR B (4102) A (3300)
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Arithmetic/Logic Unit Memory Control Unit Add A to B 2486 16 47 16 execute-- one register added to the other 31 IR B (4102) A (3300)
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Arithmetic/Logic Unit Memory Control Unit Add A to B 2486 16 47 16 execute-- store result 47 data store B + A + IR B (4102) A (3300)
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Arithmetic/Logic Unit Memory Control Unit Instruction Register Data Register Data Register instruction fetch next instruction 2486
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Control Unit Arithmetic Logic Unit
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Input Output Memory CPU Single Bus Structure Bus
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Input Output Memory CPU Bus Bus transports: Data from input devices Data to output devices Instructions from memory Data from/to memory Addresses of devices, memory locations Control signals
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Input Output Memory CPU Bus needs lines for: Addresses Data Control Bus That includes instructions--they aren’t instructions until the CPU decides they are.
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Bus address lines control lines data lines
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Memory CPU Bus MAR MDR instruction address instruction PC IR Memory Control Instruction Fetch
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Memory CPU Bus Load 7220 R1 instruction address instruction 4864 Memory Control Instruction Fetch PC 4864 4864 Load 7220 R1 Load 7220 R1 Load 7220 R1 Load 7220 R1 4864 MAR 4864 MDR IR Load 7220 R1
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This note was uploaded on 12/18/2008 for the course CS 264 taught by Professor Salloum during the Fall '08 term at Cal Poly Pomona.

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Basic Structure of - CS 264 Part 0 How Computers Work CPU Arithmetic/Logic Unit Control Unit Memory I/O Input Output Basic Functional Units of a

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