Input Output Organization

Input Output Organization - Chapter 4 Input/Output...

Info iconThis preview shows pages 1–9. Sign up to view the full content.

View Full Document Right Arrow Icon
Chapter 4 Input/Output Organization
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Processor Memory I/O device 1 I/O device n Bus Figure 4.1. A single-bus structure.
Background image of page 2
Memory-mapped I/O Input and output buffers use same address space as memory locations All instructions can access the buffers Move DATAIN, R0 Read from keyboard buffer Move R0, DATAOUT Send to display buffer DATAIN, DATAOUT: addresses of keyboard and display buffers
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Isolated I/O Separate address space for I/O devices Special instructions (e.g., IN, OUT) that indicate that the address is not in memory address space Intel processors can use either
Background image of page 4
Using the “Address Space” Move R0, DATAOUT OUT R0, DATAOUT If memory-mapped, then DATAOUT (say address 123) refers to the display buffer, same address as a memory location If isolated then DATAOUT (say address 123) refers to the display buffer, and memory location 123 is not used for this
Background image of page 5

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
I/O Bus Address lines Data lines Control lines Figure 4.2. I/O interface for an input device. interface decoder Address Data and status registers Control circuits Input device
Background image of page 6
KEN SOUT CONTROL DATAIN Figure 4.3. Registers in keyboard and display interfaces DEN DATAOUT 7 KIRQ SIN STATUS 6 5 4 3 2 1 0 DIRQ
Background image of page 7

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
#LINE, R0 Initialize memory pointer WAITK TestBit #0, STATUS Test SIN Branch=0 WAITK Wait for character to be entered Move DATAIN, R1 Read the character WAITD TestBit #1, STATUS Test SOUT Branch=0 WAITD Wait for the display to become ready Move R1, DATAOUT Send the character to the display Move R1, (R0)+ Store the character and advance the pointer Compare #$0D, R1 Check if the character is CR Branch=0 WAITK If not, get another character Move #$0A, DATAOUT Otherwise, send Line Feed Call PROCESS Call a subroutine to process the input line Figure 4.4
Background image of page 8
Image of page 9
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 12/18/2008 for the course CS 264 taught by Professor Salloum during the Fall '08 term at Cal Poly Pomona.

Page1 / 27

Input Output Organization - Chapter 4 Input/Output...

This preview shows document pages 1 - 9. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online