DESIGN_AND_IMPLEMENTATION_OF_TRAFFIC_LIG.docx

DESIGN_AND_IMPLEMENTATION_OF_TRAFFIC_LIG.docx - Design with...

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Design with PLDs and FPGAs Laboratory(11EC312L) DESIGN AND IMPLEMENTATION OF TRAFFIC LIGHTS CONTROLLER USING FPGA A Project Based Laboratory Report in partial fulfilment for the award of III/IV B.Tech - I Semester Submitted by S.Najia tasleem (Reg. No.12004338) P.Manasvi (Reg. No. 12004339) D.Teja sri (Reg. No. 12004341) R.Monica (Reg. No. 12004343) Lab Instructor Dr.Fazal NoorBasha Department of ECE, KL University, Vaddeswaram, Guntur, AP – 522502 Academic Year : 2013-2014
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Department of Electronics and Communication Engineering KL University, Vaddeswaram, Guntur, AP – 522502 C E R T I F I C A T E This is to certify that the mini project entitled "DESIGN AND IMPLEMENTATION OF TRAFFIC LIGHTS CONTROLLER USING FPGA" is for the project based laboratory for the subject “Design with PLDs & FPGAs” done by S.NAJIA TASLEM , P.MANASVI, D.TEJA SRI, R.MONICA bearing registration number’s R12004338,4339,4341,4343 is a student of III/IV B.Tech I-Semester during the academic year 2013-2014 in partial fulfilment for the award of III/IV B.Tech I-Semester of Department of Electronics and Communication Engineering, K L University, Vaddeswaram, Guntur, Andhra Pradesh, INDIA. Signature of the HOD-ECE Signature of the Lab Faculty
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DECLARATION We declare that the project entitled, DESIGN AND IMPLEMENTATION OF TRAFFIC LIGHTS CONTROLLER USING FPGA ” is our own work conducted under the esteemed guidance of Dr. Fazal Noorbasha ( Section Instructor ), Dr. Harikishore K, Mr.B.Kali Vara Prasad and Ms. M Preeti, at the Department of Electronics and Communication Engineering of KL University, Vaddeswaram, Guntur, A.P., INDIA. S.Najia tasleem (Reg. No.12004338) P.Manasvi (Reg. No. 12004339) D.Teja sri (Reg. No. 12004341) R.Monica (Reg. No. 12004343)
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ACKNOWLEDGEMENT Working on this Project based Lab is certainly a memorable and enjoyable event in our life. We have learned a lot of interesting new things that have broadened our view of the technology field. In here, we would like to offer our appreciation and thanks to several grateful and helpful individuals. Without them, this work could not have been completed and the experience would not be so enjoyable. We are very grateful to our esteemed Professors Dr. Fazal Noorbasha (Section Instructor), Dr. K Harikishore, Mr.B.Kali Vara Prasad and Ms. M Preeti, Department of ECE, KL University, Vaddeswaram, Guntur, A.P., INDIA, for their valuable guidance and creative suggestions that helped us to complete this Lab project. Furthermore, we are also very thankful Dr. Fazal Noorbasha, Microelectronics Group Head, to have an opportunity to learn from him on the aspect of using the advancing FPGA technology to improve the performance for different memory and processor applications. Hopefully, this experience will inspire us to come up with new and interesting research ideas in the future. Furthermore, we want to offer our thanks to Dr. ASCS Sastry , Professor & Head, Department ECE, KL University, Vaddeswaram, Guntur, A.P., INDIA, for providing the required facilities to carry out the project work successfully.
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  • Winter '16
  • tulasi kumar
  • Gate, DESIGN OF TRAFFIC LIGHTS

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