handout8cadence

handout8cadence - Netlist These Views: schematic gate_sch...

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EE577B CAD Tutorial 2001 Fall, Prof. Beerel Created by Jay Moon (jsmoon@usc.edu) Page 1 of 2 EE577B CAD Handout #8 Cadence: Using Verilog-XL Integration (Part 2) History 9/14/2001: Created by Jay Moon Prerequisite Handout #7 Purpose In this handout, you will get familiar with the Verilog-XL integration user interface for running a simulation on schematic. - In Adder8func library, create adder1bit schematic. (You already have symbol and functional cellviews for this Cell.) - Complete adder1bit schematic using sample library. For S, use sample->xor3 (S = A xor B xor Cin) For Cout, use sample->aoi222 and inv (Cout = (A and B) or (B and Cin) or (A and Cin)) - Check and save schematic. - Initialize Verilog-XL Integration. <CIW>Tools->Verilog Integration->Verilog-XL <Setup Environment> Run Directory: adder8bit.sch Library: Adder8func Cell: adder8bit View: schematic Verilog-XL Integration window will pop up. - Set up netlist options. <Verilog-XL>Setup->Netlist <Verilog Netlisting Options>
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Unformatted text preview: Netlist These Views: schematic gate_sch verilog Click More Stop Netlisting at Views: symbol verilog Click OK EE577B CAD Tutorial 2001 Fall, Prof. Beerel Created by Jay Moon (jsmoon@usc.edu) Page 2 of 2 - Create a stimulus file. &lt;Verilog-XL&gt;Stimulus-&gt;Verilog &lt;Stimulus Options&gt; Mode: Copy Copy From Directory: . ./adder8bit.func (move directory using File Name Form) File Name: testfixture.new Copy To File Name: testfixture.new Click Make Current Test Fixture and Check Verilog Syntax Click OK- Start the simulation and do the same procedures in the handout #7 to check the adder function. The difference between the previous handout and the previous handout is to use schematic for adder1bit instead of functional description. You should be able to mix functional description and schematic to run verilog simulation. Choosing the cellview in netlist can be controlled by putting the desired sequence in Netlist these views form....
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This note was uploaded on 03/19/2008 for the course EE 577B taught by Professor Bhatti during the Spring '08 term at USC.

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handout8cadence - Netlist These Views: schematic gate_sch...

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