Noise_Module

Noise_Module - Noise Sources in VLSI Circuits CMOS Digital...

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Noise Sources in VLSI ircuits Circuits CMOS Digital Integrated Circuits assoud Pedram Massoud Pedram Spring 2007 Dept. of Electrical Engineering–Systems niversity of Southern California University of Southern California
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On and Off Chip Clock Frequencies M. Pedram USC/EE
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Sources of Noise M. Pedram USC/EE
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Noise in Digital Systems ± Noise ± Signals may be corrupted due to ± Crosstalk ± One signal interfering with many factors: ± Power supply noise ± Crosstalk another signal ± Capacitive cross talk between RC lines on a chip ± Inter symbol interference ± Real noise (thermal and shot) ± Parameter variation ± Floating ± Driven ± Coupling between LC ansmission lines ± Independent random variables ± Power supply noise ± Inductance and resistance of transmission lines ± Near end ± Far end supply network cause voltage drops ± Spatial variation in the power istribution network M. Pedram USC/EE distribution network ± Temporal variation in the power supply voltage
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Noise Sources VK V V NN s N I =+ ± The first component represents those noise sources that are proportional to signal amplitude e.g., crosstalk and signal-induced power supply noise he second component represents noise sources that are independent of M. Pedram USC/EE ± The second component represents noise sources that are independent of signal amplitude e.g., transmitter and receiver offsets and unrelated power supply noise
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roportional and Independent Noise Sources Proportional and Independent Noise Sources ± Some of the noise sources are roportional to signal swing ± Some noise is independent proportional to signal swing ± If you increase the signal swing, you increase the noise ± rosstalk of the signal swing ± Receiver or transmitter sensitivity Crosstalk ± Inter symbol interference ± Signal return ratio (Z r /Z 0 ) ± Signal induced power supply ± Receiver or Transmitter offsets ± Independent power supply noise ± Need to cancel these sources of noise, not to overpower them noise ± Reference offsets M. Pedram USC/EE
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Power Supply Noise ± The power supply network has parasitic elements ± On chip : resistive ± Off chip: inductive ± Current draw across these elements induces a noise voltage I RI L Δ + ± Instantaneous current is what matters t Δ ± Can be many times larger than the DC current ± 10W chip draws 4A at 2.5V ± Peak current maybe 10 20A M. Pedram USC/EE
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High Speed Challenges ± Signal quality of a single net: reflections and distortions from impedance discontinuities in the signal or return paths ± Crosstalk between multiple nets: with ideal return paths ± Rail collapse in the power and ground distribution network ± EMI from a component or the system All signal integrity problems can be divided into four categories. Each one has specific causes.
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This note was uploaded on 03/19/2008 for the course EE 577B taught by Professor Bhatti during the Spring '08 term at USC.

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Noise_Module - Noise Sources in VLSI Circuits CMOS Digital...

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