LECTURE 2- MICROPROCESSOR EXAMPLE

LECTURE 2- MICROPROCESSOR EXAMPLE - Introduction to CMOS...

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Unformatted text preview: Introduction to CMOS VLSI Design Lecture 2: MIPS Processor Example David Harris Harvey Mudd College Spring 2004 2: MIPS Processor Example Slide 2 CMOS VLSI Design Outline q Design Partitioning q MIPS Processor Example – Architecture – Microarchitecture – Logic Design – Circuit Design – Physical Design q Fabrication, Packaging, Testing 2: MIPS Processor Example Slide 3 CMOS VLSI Design Activity 2 q Sketch a stick diagram for a 4-input NOR gate 2: MIPS Processor Example Slide 5 CMOS VLSI Design Coping with Complexity q How to design System-on-Chip? – Many millions (soon billions!) of transistors – Tens to hundreds of engineers q Structured Design q Design Partitioning 2: MIPS Processor Example Slide 6 CMOS VLSI Design Structured Design q Hierarchy : Divide and Conquer – Recursively system into modules q Regularity – Reuse modules wherever possible – Ex: Standard cell library q Modularity : well-formed interfaces – Allows modules to be treated as black boxes q Locality – Physical and temporal 2: MIPS Processor Example Slide 7 CMOS VLSI Design Design Partitioning q Architecture : User’s perspective, what does it do? – Instruction set, registers – MIPS, x86, Alpha, PIC, ARM, … q Microarchitecture – Single cycle, multcycle, pipelined, superscalar? q Logic : how are functional blocks constructed – Ripple carry, carry lookahead, carry select adders q Circuit : how are transistors used – Complementary CMOS, pass transistors, domino q Physical : chip layout – Datapaths, memories, random logic 2: MIPS Processor Example Slide 8 CMOS VLSI Design Gajski Y-Chart 2: MIPS Processor Example Slide 9 CMOS VLSI Design MIPS Architecture q Example: subset of MIPS processor architecture – Drawn from Patterson & Hennessy q MIPS is a 32-bit architecture with 32 registers – Consider 8-bit subset using 8-bit datapath – Only implement 8 registers ($0 - $7) – $0 hardwired to 00000000 – 8-bit program counter q You’ll build this processor in the labs – Illustrate the key concepts in VLSI design 2: MIPS Processor Example Slide 10 CMOS VLSI Design Instruction Set 2: MIPS Processor Example Slide 11 CMOS VLSI Design Instruction Encoding q 32-bit instruction encoding – Requires four cycles to fetch on 8-bit datapath format example encoding R I J ra rb rd funct op op ra rb imm 6 6 6 6 5 5 5 5 5 5 16 26 add $rd, $ra, $rb beq $ra, $rb, imm j dest dest 2: MIPS Processor Example Slide 12 CMOS VLSI Design Fibonacci (C) f = 1; f-1 = -1 f n = f n-1 + f n-2 f = 1, 1, 2, 3, 5, 8, 13, … 2: MIPS Processor Example Slide 13 CMOS VLSI Design Fibonacci (Assembly) q 1 st statement: n = 8 q How do we translate this to assembly? 2: MIPS Processor Example Slide 14 CMOS VLSI Design Fibonacci (Assembly) 2: MIPS Processor Example Slide 15 CMOS VLSI Design Fibonacci (Binary) q 1 st statement: addi $3, $0, 8 q How do we translate this to machine language?...
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This note was uploaded on 03/19/2008 for the course EE 577B taught by Professor Bhatti during the Spring '08 term at USC.

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LECTURE 2- MICROPROCESSOR EXAMPLE - Introduction to CMOS...

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