solutionsodd

# solutionsodd - Solutions Note Version 2.0 completed...

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Solutions 1 Note: Version 2.0 completed 12/23/04. Includes solutions to nearly all problems. Thanks to Ted Jiang for generating many of the SPICE simulations. Chapter 1 1.1 Starting with 42,000,000 transistors in 2000 and doubling every 26 months for 10 years gives transistors. 1.3 1.5 42 M2 1 0 12 26 ----------------   1B A B C D Y A Y (a) A B Y (b) A B Y (c) (d) A C B Y

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SOLUTIONS 2 1.7 1.9 The minimum area is 5 tracks by 5 tracks (40 λ x 40 λ = 1600 λ 2 ). 1.11 1.13 This latch is nearly identical save that the inverter and transmission gate feedback A0 A0 A1 A1 Y0 Y1 Y2 Y3 (a) Y1 Y0 A0 A1 A1 A0 A2 (b) n+ n+ p substrate p+ p+ n well A Y VDD n+ GND B
CHAPTER 2 SOLUTIONS 3 has been replaced by a tristate feedaback gate. 1.15 (c) 5 x 6 tracks = 40 λ x 48 λ = 1920 λ 2 . (with a bit of care) (d-e) The layout should be similar to the stick diagram. 1.17 20 transistors, vs. 10 in 1.16(a). 1.19 The lab solutions are available to instructors on the web. Chapter 2 Y D CLK CLK CLK CLK (b) A B C A VDD GND B C F D A B C D (a) D F A Y B A C B C

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SOLUTIONS 4 2.1 2.3 The body effect does not change (a) because V sb = 0. The body effect raises the threshold of the top transistor in (b) because V sb > 0. This lowers the current through the series transistors, so I DS 1 > I DS 2 . 2.5 The minimum size diffusion contact is 4 x 5 λ , or 1.2 x 1.5 μ m. The area is 1.8 μ m 2 and perimeter is 5.4 μ m. Hence the total capacitance is At a drain voltage of VDD, the capacitance reduces to 2.7 No. Any number of transistors may be placed in series, although the delay increases with the square of the number of series transistors. 2.9 (a) (1.2 - 0.3) 2 / (1.2 - 0.4) 2 = 1.26 (26%) ( 29 14 2 8 3. 9 8.85 10 35 0 12 0/ 100 10 ox W WW C AV L LL b mm - -  •⋅ = ==   0 1 2 3 4 5 0 0.5 1 1.5 2 2.5 V ds I ds (mA) V gs = 5 V gs = 4 V gs = 3 V gs = 2 V gs = 1 ( 29( 29 ( 29( 29 ( 0 ) 1. 8 0.4 2 5. 4 0.3 3 2.54 db C V fF =+= ( 29( 29 0.4 4 0.12 55 ( 5 ) 1. 8 0.4 2 1 5. 4 0.3 3 1 1.78 0.9 8 0.98 db C V fF -- = + + +=
CHAPTER 2 SOLUTIONS 5 (b) (c) v T = k T / q = 34 mV; ; note, however, that the total leakage will normally be higher for both threshold voltages at high temperature. 2.11 The nMOS will be off and will see V ds = V DD , so its leakage is 2.13 Assume V DD = 1.8 V. For a single transistor with n = 1.4, For two transistors in series, the intermediate voltage x and leakage current are found as: In summary, accounting for DIBL leads to more overall leakage in both cases. However, the leakage through series transistors is much less than half of that through a single transistor because the bottom transistor sees a small Vds and much less DIBL. This is called the stack effect . For n = 1.0, the leakage currents through a single transistor and pair of transistors are 13.5 pA and 0.9 pA, respectively. 2.15 V IL = 0.3; V IH = 1.05; V OL = 0.15; V OH = 1.2; NM H = 0.15; NM L = 0.15 2.17 Either take the grungy derivative for the unity gain point or solve numerically for e 0.3 1. 4 0.026 -------------------------- e 0.4 1. 4 0.026 ---------------------- 15.6 = e 0.3 1. 4 0.034 e 0.4 1. 4 0.034 8.2 = 2 1.8 69 t T V nv lea k ds nT I I ve e pA b - = == 2 1.8 499 t DD T VV nv lea k ds I I e pA h b -+ = ( 29 ( 29 2 1. 8 2 1.8 1 1 69 mV; 69 pA D Dt t T TT D t T V xVx Vx x n v v nv lea k V x n v v nv leak I e e vee e ee xI h h h h bb --- - -  = -=  

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SOLUTIONS 6 V IL = 0.46 V, V IH = 0.54 V, V OL = 0.04 V, V OH = 0.96 V, NM H = NM
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solutionsodd - Solutions Note Version 2.0 completed...

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