LECTURE 7 SPICE SIMULATION

LECTURE 7 SPICE SIMULATION - Introduction to CMOS VLSI...

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Unformatted text preview: Introduction to CMOS VLSI Design Lecture 7: SPICE Simulation David Harris Harvey Mudd College Spring 2004 7: SPICE Simulation Slide 2 CMOS VLSI Design Outline q Introduction to SPICE q DC Analysis q Transient Analysis q Subcircuits q Optimization q Power Measurement q Logical Effort Characterization 7: SPICE Simulation Slide 3 CMOS VLSI Design Introduction to SPICE q S imulation P rogram with I ntegrated C ircuit E mphasis Developed in 1970s at Berkeley Many commercial versions are available HSPICE is a robust industry standard Has many enhancements that we will use q Written in FORTRAN for punch-card machines Circuits elements are called cards Complete description is called a SPICE deck 7: SPICE Simulation Slide 4 CMOS VLSI Design Writing Spice Decks q Writing a SPICE deck is like writing a good program Plan: sketch schematic on paper or in editor Modify existing decks whenever possible Code: strive for clarity Start with name, email, date, purpose Generously comment Test: Predict what results should be Compare with actual Garbage In, Garbage Out! 7: SPICE Simulation Slide 5 CMOS VLSI Design Example: RC Circuit * rc.sp * David_Harris@hmc.edu 2/2/03 * Find the response of RC circuit to rising input *------------------------------------------------ * Parameters and models *------------------------------------------------ .option post *------------------------------------------------ * Simulation netlist *------------------------------------------------ Vin in gnd pwl 0ps 0 100ps 0 150ps 1.8 800ps 1.8 R1 in out 2k C1 out gnd 100f *------------------------------------------------ * Stimulus *------------------------------------------------ .tran 20ps 800ps .plot v(in) v(out) .end R1 = 2K C1 = 100fF Vin + Vout- 7: SPICE Simulation Slide 6 CMOS VLSI Design Result (Textual) legend: a: v(in) b: v(out) time v(in) (ab ) 0. 500.0000m 1.0000 1.5000 2.0000 + + + + + 0. 0. - 2------+------+------+------+------+------+------+------+- 20.0000p 0. 2 + + + + + + + + 40.0000p 0. 2 + + + + + + + + 60.0000p 0. 2 + + + + + + + + 80.0000p 0. 2 + + + + + + + + 100.0000p 0. 2 + + + + + + + + 120.0000p 720.000m + b + + a + + + + + + 140.0000p 1.440 + b + + + + + a + + + 160.0000p 1.800 + + b + + + + + + a + 180.0000p 1.800 + + b + + + + + + a + 200.0000p 1.800 -+------+------+ b-----+------+------+------+------+ a-----+- 220.0000p 1.800 + + + b + + + + + a + 240.0000p 1.800 + + + + b + + + + a + 260.0000p 1.800 + + + + b + + + + a + 280.0000p 1.800 + + + + b + + + + a + 300.0000p 1.800 + + + + + b + + + a + 320.0000p 1.800 + + + + + b + + + a + 340.0000p 1.800 + + + + + b + + + a + 360.0000p 1.800 + + + + + b + + a + 380.0000p 1.800 + + + + + + b + + a + 400.0000p 1.800 -+------+------+------+------+------+-- b---+------+ a-----+- 420.0000p 1.800 + + + + + + b + + a + 440.0000p 1.800 + + + + + + b + + a + 460.0000p 1.800 + + + + + + b + + a + 480.0000p 480....
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This note was uploaded on 03/19/2008 for the course EE 577B taught by Professor Bhatti during the Spring '08 term at USC.

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LECTURE 7 SPICE SIMULATION - Introduction to CMOS VLSI...

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