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Unformatted text preview: In computers, we call it a “shift left” when data moves leftward in the binary number (i.e. the 1’s place goes to the
2’s place, the 2’s place to the 4’s place, and so on). A “shift right” moves rightward in the binary number. Shifts also differ on what the shiftin value is (on a shift left, what goes into the rightmost bit position? On a shift
right, what goes into the leﬁmost bit position?). Computers have three major types of shifts, based on how they ﬁll
that position: Logical shift (shift in a 0), Arithmetic shift (compute Val*2 for left shift, val/2 with sign extension for
right), and Circular shift (the bit shifted out one side is shiﬁed back in the other side). Develop a single, 4bit shift
register that can implement all of these shiﬁs, as well as a parallel load. Use the following control line settings: C1 C0 Direction Operation 0 0 0 Hold 0 0 1 Load Parallel 0 1 0 Logical right 0 l 1 Logical left 1 0 0 Arithmetic right
1 0 l Arithmetic left 1 1 0 Circular right 1 1 1 Circular leﬁ é?
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—Nwtmmq On slide 179 we showed how shift registers can transfer information between chips on a single wire. It requires the
sender to do the operation sequence “Load, Shift, Shift, Shift” and repeat, while the receiver always shifts, but reads
the values every 4 cycles (cycle 5, 9, 13, etc). Imagine the designers use the same exact hardware, but make the
modiﬁcations listed below. What data will be seen on the receiving end? List exactly which source bits appear, in what bit positions, on the receiving side. a.) Sender does “Load, Shift, Shift” and repeat (missing one needed shift). Receiver reads the values every 3
cycles (cycles 4, 7, 10, 13, etc.). b.) Sender does “Load, Shift, Shift, Shift, Shift” and repeat (adding one needed shift). Receiver reads the
values every 5 cycles (cycles 6, 11, 16, ...). Cyclc (644.01 o. Q o (D (W901 {20 .
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X Build a 4bit counter that can do the followin_. Your dia; am can use an basic _ates, DFFs, and Muxes: C0 Action Reset ou ut = 0) 1 U  count Downcount U b two +2 to current value. If value too lar_e to hold, value = value — 16)
Ub four +4 to current value. If value too 1ar_e to hold, value = value — 16
1 Set all outut bits to 1 Parallel Load D— D‘ r—t >—t O
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 Winter '15
 andersen

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