HTMT_NNC_C3.pps

# HTMT_NNC_C3.pps - Chapter 3 Digital Logic Structures...

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Chapter 3 Digital Logic Structures

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3-2 Transistor: Building Block of Computers Microprocessors contain millions of transistors Intel Pentium 4 (2000): 48 million IBM PowerPC 750FX (2002): 38 million IBM/Apple PowerPC G5 (2003): 58 million Logically, each transistor acts as a switch Combined to implement logic functions AND, OR, NOT Combined to build higher-level structures Adder, multiplexer, decoder, register, … Combined to build processor LC-3
3-3 Simple Switch Circuit Switch open : No current through circuit Light is off V out is +2.9V Switch closed : Short circuit across switch Current flows Light is on V out is 0V Switch-based circuits can easily represent two states: on/off, open/closed, voltage/no voltage.

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3-4 MOS Transistor MOS = Metal Oxide Semiconductor two types: n-type and p-type n-type when Gate has positive voltage, short circuit between #1 and #2 (switch closed ) when Gate has zero voltage, open circuit between #1 and #2 (switch open ) Gate = 0 Gate = 1 Terminal #2 must be connected to GND (0V).
3-5 p-type MOS Transistor p-type is complementary to n-type when Gate has positive voltage, open circuit between #1 and #2 (switch open ) when Gate has zero voltage, short circuit between #1 and #2 (switch closed ) Gate = 1 Gate = 0 Terminal #1 must be connected to +2.9V.

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3-6 Logic Gates Use switch behavior of MOS transistors to implement logical functions: AND, OR, NOT. Digital symbols: recall that we assign a range of analog voltages to each digital (logic) symbol assignment of voltage ranges depends on electrical properties of transistors being used typical values for "1": +5V, +3.3V, +2.9V from now on we'll use +2.9V
3-7 CMOS Circuit Complementary MOS Uses both n-type and p-type MOS transistors p-type Attached to + voltage Pulls output voltage DOWN when input is zero n-type Attached to GND Pulls output voltage DOWN when input is one For all inputs, make sure that output is either connected to GND or to +, but not both!

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3-8 Inverter (NOT Gate) In Out 0 V 2.9 V 2.9 V 0 V In Out 0 1 1 0 Truth table
3-9 NOR Gate A B C 0 0 1 0 1 0 1 0 0 1 1 0 Note: Serial structure on top, parallel on bottom.

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3-10 OR Gate Add inverter to NOR. A B C 0 0 0 0 1 1 1 0 1 1 1 1
3-11 NAND Gate (AND-NOT) A B C 0 0 1 0 1 1 1 0 1 1 1 0 Note: Parallel structure on top, serial on bottom.

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3-12 AND Gate Add inverter to NAND. A B C 0 0 0 0 1 0 1 0 0 1 1 1
3-13 Basic Logic Gates

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3-14 DeMorgan's Law Converting AND to OR (with some help from NOT) Consider the following gate: A B 0 0 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 1 1 0 0 0 1 B A B A B A Same as A+B! To convert AND to OR (or vice versa), invert inputs and output .
3-15 More than 2 Inputs? AND/OR can take any number of inputs.

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• Spring '16
• dennis

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