第四章(5).ppt - Digital Logic Design and Application...

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1 Chapter 4 Combinational Logic Design Principles ( 组合逻辑设计原理 ) Basic Logic Algebra ( 逻辑代数基础 ) Combinational-Circuit Analysis ( 组合电路分析 ) Combinational-Circuit Synthesis ( 组合电路综合 ) Digital Logic Design and Application ( 数字逻辑设计及
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2 4.5 Timing Hazards ( 定时冒险 ) Steady-state Behavior & Transient Behavior ( 稳态特性 瞬态特性 ) Circuit Delays ( 电路延迟 ) Hazard (冒险 A A’ F Glitch ( 尖峰 ) Digital Logic Design and Application ( 数字逻辑设计及 A F
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3 补充:竞争-冒险 (清华教材) 竞争:门电路两个输入信号同时向相反的逻辑电平跳变。 若后继负载电路是一个对脉冲敏感的电路, 这种尖峰脉冲可能使负载电路发生误动作。 竞争-冒险:由于竞争而在电路输出端 可能 产生尖峰脉 Digital Logic Design and Application ( 数字逻辑设计及 A Y1 A Y2
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4 4.5.1 Static Hazards ( 静态冒险 ) Static 1-Hazards ( 静态 -1 型冒险 ) Static 0-Hazards ( 静态 -0 型冒险 ) 主要存在于“与-或”电路中 A F A F 主要存在于“或-与”电路中 A A Y 1 Y 2 A A
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5 X=Y=1 W=X=Y=0 教材图 4- 38
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6 检查竞争-冒险现象的方法 只要输出端的逻辑函数在一定条件下能简化成 Y = A + A Y = A · A 则可判定存在竞争—冒险 Y = AB +AC B = C = 1 Y = A + A ,存在静态 1 冒险 又如 Y = ( A + B ) ( B + C ) A = C = 0 Y = B · B ,存在静态 0 冒险 Digital Logic Design and Application ( 数字逻辑设计及 代数法
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7 4.5.2 Finding Static Hazards Using Maps ( 利用卡诺图发现静态冒 ) Z XY 00 01 11 10 0 1 1 1 1 1 若卡诺图中, 圈与圈之间有相切现象, 则可能出现静态冒险。
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  • Spring '14
  • JiangChaoshu

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