第四章(3).ppt - Digital Logic Design and Application...

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1 Chapter 4 Combinational Logic Design Principles ( 组合逻辑设计原理 ) Basic Logic Algebra ( 逻辑代数基础 ) Combinational-Circuit Analysis ( 组合电路分析 ) Combinational-Circuit Synthesis ( 组合电路综合 ) Digital Logic Design and Application ( 数字逻辑设计及
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2 Review of 4.1 Switching Algebra ( 开关代数内容回顾 ) 基本公理、定理 对偶、反演 补充: 同或 异或 A B Y = A B Y =1 A B Y A B Y 逻辑函数及其表示方 真值表 逻辑函数 Digital Logic Design and Application ( 数字逻辑设计及
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3 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 A B C F 0 0 0 1 0 0 0 0 F 1 = + + 0 0 0 0 0 0 1 0 F 2 0 0 0 0 0 0 0 1 F 3 为什么是最小项之和 (Minterm Sum) Digital Logic Design and Application ( 数字逻辑设计及
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4 0 0 0 0 0 0 1 1 0 1 0 1 0 1 1 0 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0 A B C F 0 1 1 1 1 1 1 1 F 1 = · · 1 1 1 0 1 1 1 1 F 2 1 1 1 1 1 1 1 0 F 3 为什么是最大项之积 (Maxtern Sum) Digital Logic Design and Application ( 数字逻辑设计及
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5 逻辑函数的基本运算 相加(或) 相乘(与) 反演 F1 = (A,B,C) ( 1, 5, 7, 9, 13 ) F2 = (A,B,C) ( 2, 6, 9, 13, 15 ) F = F1 + F2 = (A,B,C) (1,2,5,6,7,9,13,15) F = F1 · F2 = (A,B,C) (9,13) F1’ = (A,B,C) ( 1, 5, 7, 9, 13 ) = (A,B,C) ( 0,2,3,4,6,8,10,11,12,14,15 ) Digital Logic Design and Application ( 数字逻辑设计及
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6 逻辑函数的标准表示法 (Standard Expression) 真值表 乘积项、求和项 “ 积之和”表达式 “ 和之积”表达式 标准项( normal term n 变量最小项 n 变量最大项 编号:原变量 1 、反变量 0 编号:原变量 0 、反变量 1 F = A,B,C (1,3,6,7) G = A,B,C (0,2,4,5) Digital Logic Design and Application ( 数字逻辑设计及
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7 4.2 Combinational-Circuit Analysis ( 组合电路分析 ) 分析的目的:确定给定电路的逻辑功能 A B F A’ B’ (A’·B’)’ (A·B)’ F = [ (A’·B’)’ · (A·B)’ ]’ = A’·B’ + A·B = A B Digital Logic Design and Application ( 数字逻辑设计及
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8 From logic circuit to logic equation Get logic equation for each output 4.2 Combinational-Circuit Analysis ( 组合电路分析 ) Digital Logic Design and Application ( 数字逻辑设 4-11 4-12 4-13 代数法
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9 4.2 Combinational-Circuit Analysis ( 组合电路分析 ) Digital Logic Design and Application ( 数字逻辑设计及 From input wave to output wave !
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