HOME WORK # 3
Due Date: October 29, 2007
Q1)
(4.11)
State the phases of the instruction cycle and briefly describe what operations occur in each phase.
Q2)
(4.8)
Suppose a 32bit instruction has the following format:
OPCODE DR SR1 SR2 UNUSED
If there are 255 opcodes and 120 registers, and every register is available as a source or
destination for every opcode,
1.
What is the minimum number of bits required to represent the
OPCODE
?
2.
What is the minimum number of bits required to represent the Destination Register (
DR
)?
3.
What is the maximum number of
UNUSED
bits in the instruction encoding?
Q3)
If a computer has a 16bit MAR and a 32bit MDR:
1.
How many memory locations are available in the memory of this computer?
2.
How many bits are stored at each of those locations?
3.
What is the total size of the memory (in Bytes)?
Q4)
(Prob 5.5)
1.
What is an addressing mode?
2.
Name three places an instruction's operands might be located.
3.
List the five addressing modes of the LC3, and for each one state where the operand is
located (from part b).
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 Fall '07
 Ambler
 Machine code, Instruction Cycle

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