F05prelim1

F05prelim1 - ENGRD 230 Introduction to Digital Logic Design...

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ENGRD 230: Introduction to Digital Logic Design Fall 2005 1 ENGRD 230 – Fall 2005 Prelim 1 Tuesday, October 4, 2005 Closed book, closed notes, no calculators Time limit: 75 minutes Academic integrity is expected of all students of Cornell University at all times, whether in the presence or absence of the faculty. Understanding this, I declare I shall not give, use or receive unauthorized aid in this work. ________________________ Signature ________________________ Name ________________________ NetID Please write your NetID at the top of each page of your exam.

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ENGRD 230: Introduction to Digital Logic Design Fall 2005 2 Problem Score 1 /15 2 /15 3 /15 4 /20 5 /15 6 /20 Total /100
ENGRD 230: Introduction to Digital Logic Design Fall 2005 NET ID: ___________ 3 Problem 1. (15 points) Consider the following CMOS circuit diagram. V dd Gnd A B Z C D Q7 Q8 Q5 Q6 Q3 Q2 Q1 Q4 (a) Finish filling in the following function table. For each transistor Q1 to Q8, enter N if the transistor is ON and enter F if the transistor is OFF. For the output Z, enter H if the output is High and L if the output is Low. A B C D Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Z L L L L OFF ON ON OFF L L L H OFF OFF ON OFF L L H L OFF ON ON OFF L L H H OFF OFF ON OFF L H L L ON ON ON OFF L H L H ON OFF ON OFF L H H L ON ON ON OFF L H H H ON OFF ON OFF H L L L OFF ON OFF ON H L L H OFF OFF OFF ON H L H L OFF ON OFF ON H L H H OFF OFF OFF ON H H L L ON ON OFF ON H H L H ON OFF OFF ON H H H L ON ON OFF ON H H H H ON OFF OFF ON (b) Write a Boolean expression for Z.

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F05prelim1 - ENGRD 230 Introduction to Digital Logic Design...

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