1EE 469 Operating Systems EngineeringHardware Support forOperating SystemsSpring 2001David S. EbertComputer-System ArchitectureInterruptsA mechanism for achieving coordination betweenconcurrently operating units of a computer system, andfor responding to specific conditions within a processor.A transfer of flow of control that is forced by thehardware.Trap - a software generated interrupt caused either by anerror, or by a user program request that an OS service beperformed.
2Basic I/O and Computer-System OperationI/O devices and the CPU can execute concurrently.Each device controller is in charge of a particular devicetype.Each device controller has a local buffer and specialpurpose registers.CPU moves data from/to main memory to/from local buffersI/O is from the device to local buffer of controller.Device controller informs CPU that it has finished itsoperation by causing an interrupt.Common Functions of InterruptsInterrupts transfers control to the interrupt serviceroutine generally, through the interrupt vector, whichcontains the addresses of all the service routines.Interrupt architecture must save the address of theinterrupted instruction.Incoming interrupts are disabled(at this and lowerpriority levels) while the interrupt is being processed toprevent a lost interrupt.Interrupts are enabled after servicing current interruptModern operating systems are interruptdriven.Interrupt HandlingThe operating system preserves the state of the CPU bystoring registers and the program counter.Determines which type of interrupt has occurred:•polling•vectored interrupt systemSeparate segments of code determine what action shouldbe taken for each type of interrupt
3Interrupt Time Line For a Single Process DoingOutputI/O StructureSynchronous I/O: After I/O starts, control returns to userprogram only upon I/O completion.•wait instruction idles the CPU until the next interrupt•wait loop (contention for memory access).•At most one I/O request is outstanding at a time, no simultaneousI/O processing.
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- Operating Systems, Central processing unit, Interrupt, Interrupt handler, Interrupt vector