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ece314_sec7_TA

# ece314_sec7_TA - ECE/CS314 Section 7 Cache Two main sources...

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ECE/CS314 Section 7 Cache Two main sources of difficulties in students solving cache questions A lot of (loosely defined) terminology: Direct mapped cache, set associative cache, fully associative cache, ... Hit, miss, compulsory miss = cold miss, conflict miss = collision miss, capacity miss, ... Block, sets = cache lines = entries, ... Byte offset + block offset = offset, block index, index, tag, ... Valid bit, dirty bit, ... Temporal locality, spatial locality, ... Miss rates, miss penalty, ... Math with or without calculator What’s K? B? b? Is K(ilo) 1000 or 1024? Division and multiplication of integers Logarithms!!! 2 x =16K, x=log(16K) =???

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Keep a small set that we frequently access in memory closer in fast storage called a cache Question : How do we know which part of memory we’ll use frequently? Temporal locality : if an item is referenced, it will tend to be referenced again soon Spatial locality : if an item is referenced, items whose addresses are close by tend to be referenced soon Average Memory Access Time (AMAT) with Cache Try the cache , if it’s there (hit), take it. If not (miss), read from memory (hit time ) + (miss rate ) (miss penalty ) Byte offset Valid Tag Data Hit Data 16 32 16K entries 32 bits Tag Index Block = sets = cache lines Memory access address Note that the cache shown left has 1 word blocks 16K entries (= sets = cache lines ) Part of memory access address is used in choosing one of the entries in the cache: How many bits of index do you need? How many bits is a byte offset ? How many bits are tags ? What is the total size of “Data” portion in this cache? 32bits*16K=4B*16K=64KB Hence, it is called a cache with 64KB data and 1 word blocks Question: Why aren’t we using the most significant bits as Index ? Direct-mapped cache:
Address (showing bit positions) 16 14 Byte offset Valid Tag Data Hit Data 16 32 16K entries 16 bits 32 bits 31 30 17 16 15 5 4 3 2 1 0 Tag Index Block = sets = cache lines Note that the cache shown left has 1 word blocks 16K entries (= sets = cache lines ) Part of memory access address is used in choosing one of the entries in the cache: How many bits of index do you need? Log2(16K)=14 How many bits is a byte offset ? Log2(4B)=2 How many bits are tags ? 32 2 14=16 What is the total size of “Data” portion in this cache? 32bits*16K=4B*16K=64KB Hence, it is called a cache with 64KB data and 1 word blocks Question: Why aren’t we using the most significant bits as Index ? Answer: Because it’ll ruin spatial locality by having nearby memory space competing for the same entry of cache. Direct-mapped cache: 32B cache with 1-word blocks? Can you imagine what it looks like? How many cache lines (= entries = sets ) in this cache? How many bits of index do you need? How many bits is a byte offset ? How many bits are tags ?

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32B cache with 1-word blocks? Can you imagine what it looks like?
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