Computer Science 152 - Fall 1995 - Patterson - Midterm 2

Computer Science 152 - Fall 1995 - Patterson - Midterm 2 -...

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Unformatted text preview: University of California at Berkeley College of Engineering Computer Science Division - EECS CS 152 D. Patterson & R. Yung Fall 1995 Computer Architecture and Engineering Midterm II You may use two pages of notes. You have 180 minutes. Please write your name on this cover sheet and also at the top left of each page. The point value of each question is indicated in brackets after it. Please show your work. Write neatly and be well organized. Good luck! Your Name: SID Number: Discussion TA(s): Problem Score 1 / 27 2 / 13 3 / 30 4 / 20 Total / 90 Your Name: 1 Question 1: Virtual Memory An eight-entry direct-mapped TLB is implemented in the current design. Both the virtual and physical addresses are 32 bits wide, and page size is 4kB. Address translation is performed by this TLB for every memory access. NOTE: All addresses are given in hexadecimal. a) Label the virtual and physical address fields used in address translation. [4 pt] Virtual Address 31 12 11 Physical Address 31 12 11-1 for having VPN=[31:13], PFN=[12:0]-2 for all other mistakes Virtual Page Number (VPN) Offset Physical Frame Number (PFN) Offset Your Name: 2 b) If a valid translation is found and access protection is not violated, the corresponding physical frame number is used to generate the physical address. If there is a TLB miss, the TLB is refilled with the next available physical frame number start- ing at 0x3. (You may assume that every TLB miss also causes a page fault.) The access pro- tection for the new page should be read- and write-enabled. If access protection is violated, the access should be aborted and no physical frame number generated. The initial state of the TLB is given in Table 1. For the four memory accesses in Table 2, show the translated physical addresses and indicate fault types, if any, based on the initial TLB state. [16 pt] NOTE: the memory accesses should be done in the order shown. Per line:-1 for missing 0 or offset value-2 for all other mistakes Table 1: Initial TLB state (do not modify this table) Index Virtual Page Number Physical Frame Number Read Write Valid 1 0x1 0x0 1 1 2 3 4 0x104 0x1 1 1 1 5 0x4005 0x2 1 1 6 7 Table 2: Memory accesses Virtual address Physical address Fault type, if any 0x1008 (read) 0x0008 none 0x0 (read) 0x3000 TLB miss 0x4005000 (read) 0x4000 TLB miss 0x10BC (write) Write access viol. Your Name:...
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Computer Science 152 - Fall 1995 - Patterson - Midterm 2 -...

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