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Computer Science 152 - Spring 1999 - Kubiatowicz - Midterm 1

# Computer Science 152 - Spring 1999 - Kubiatowicz - Midterm...

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1 University of California, Berkeley College of Engineering Computer Science Division EECS Spring 1999 John Kubiatowicz Midterm I SOLUTIONS March 3, 1999 CS152 Computer Architecture and Engineering Your Name: SID Number: Discussion Section: Problem Possible Score 1 15 2 15 3 20 4 20 5 30 Total

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2 Problem 1: Performance Problem 1a : Name the three principle components of runtime that we discussed in class. How do they combine to yield runtime? Three components: Instruction Count, CPI, and Clock Period (or Rate) Rate Clock CPI Count Inst period Clock CPI Count Inst Runtime × = × × = Now, you have analyzed a benchmark that runs on your company’s processor. This processor runs at 300MHz and has the following characteristics: Instruction Type Frequency (%) Cycles Arithmetic and logical 40 1 Load and Store 30 2 Branches 20 3 Floating Point 10 5 Your company is considering a cheaper, lower-performance version of the processor. Their plan is to remove some of the floating-point hardware to reduce the die size. The wafer on which the chip is produced has a diameter of 10cm, a cost of \$2000, and a defect rate of 1 / (cm 2 ). The manufacturing process has an 80% wafer yield and a value of 2 for α . Here are some equations that you may find useful: The current procesor has a die size of 12mm × 12mm. The new chip has a die size of 10mm × 10mm, and floating point instructions will take 12 cycles to execute. Problem 1b : What is the CPI and MIPS rating of the original processor? CPI = .4 × 1+ .3 × 2 + .2 × 2 + .1 × 5 = 2.1 cycles/inst MIPS= 1 . 2 300 MHz = 143 MIPS ( ) area die 2 diameter wafer area die diameter/2 wafer dies/wafer × × π × π = 2 α α × + × = area die area unit per defects 1 yield wafer yield die
3 Problem 1c: What is the CPI and MIPS rating of the new processor? CPI = .4 × 1+.3 × 2+.2 × 3+.4 × 12= 2.8 cycles/inst MIPS = 8 . 2 300 MHz = 107 MIPS Problem 1d: What is the original cost per (working) processor? Problem 1e: What is the new cost per (working) processor? Problem 1f: What is the improvement (if any) in price per performance? So, 39% improvement. Note that we took most reasonable solutions that took ratios of the old and new price-performance ratios . ( ) dice/wafer 36 03 . 36 2 mm 44 1 2 mm 00 1 2 144mm 2 100mm/2 dice/wafer = × × π × π = 27 . 0 2 2 2 cm 44 . 1 2 cm / 1 1 .8 yield die = × + × = ( ) dice/wafer 56 33 . 56 2 mm 00 1 2 mm 00 1 2 100mm 2 100mm/2 dice/wafer = × × π × π = 355 . 0 2 / 2 = × + × = 2 2 1cm cm 1 1 .8 yield die dice/wafer good 9 9.7 0.27 36 dice/wafer good = × = die / 22 . 222 \$ 9 \$2000 cost/die = = dice/wafer good 0.355 6 dice/wafer good 19 9 . 19 5 = × = die 19 \$2000 cost/die / 3 . 105 \$ = = ( ) ( ) ( ) 37 . 55 . 1 98 . 0 55 . 1 % = = = old new old orm price/perf orm price/perf orm price/perf t improvemen

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4 Problem 2: Delay For a Full Adder A key component of an ALU is a full adder. A symbol for a full adder is: ‘Problem 2a: Implement a full adder using as few 2-input AND, OR, and XOR gates as possible. Keep in mind that the Carry In signal may arrive much later than the A or B inputs. Thus, optimize your design (if possible) to have as few gates between Carry In and the two outputs as possible: Full Adder A B S C in C out A C in B S C out
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