Computer Science 150 - Fall 1998 - Fearing - Midterm 1

Computer Science 150 - Fall 1998 - Fearing - Midterm 1 -...

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1 of 6 Problem 1 (25 points) [8 pts.] a) You are given the logic diagram below. Complete the truth table for . Hint: Bubble matching and simplify. [8 pts.] b) In this problem you will design a combinational circuit which takes an 8 bit number A[7:0] and determines if has an even number of ones. For example, if the input , then . The circuit is built from 1-bit modules as shown below. Complete the truth table for the module: [6 pts.] c) Show how the 1-bit modules would be interconnected, using only wires but no extra gates or invert- ers, to create an 8-bit even-parity checker. [3 pts.] d) Determine the maximum delay, assuming 1-unit delay for NOT/NAND/NOR, 2-unit delay for AND/OR, and 3-unit delay for XOR/XNOR. A EI EO 00 01 10 11 Yf A B C ,, () = A.H A.L C.H C.L 000 001 010 011 100 101 110 111 A B C A B C = B.H C.H A.H B.H C.L A.L A.L C.H B.H A A 00001100 2 = EVEN_OUT 1 = A n EI EO A Even In Even Out

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2 of 6 Problem 2 (25 points) Timing Complete the time diagram for the figure below, assuming unit delays for all gates and inverters (transport delay only), and no delay in the wires. (The dashed lines in the diagram represent missing sections of the timing dia-
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This note was uploaded on 05/17/2009 for the course CS 150 taught by Professor Staff during the Spring '08 term at Berkeley.

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Computer Science 150 - Fall 1998 - Fearing - Midterm 1 -...

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