Electrical Engineering 40 - Fall 1998 - Howe - Midterm 2

Electrical Engineering 40 - Fall 1998 - Howe - Midterm 2 -...

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EE40 -- MT2, Fall 1998 University of California at Berkeley College of Engineering Dept. of Electrical Engineering and Computer Sciences EECS 40 Midterm II Fall 1998 Prof. Roger T. Howe November 19, 1998 Name: ________________________ Student ID: ____________________ Guidelines 1. Closed Book and notes; one 8.5" x 11" page (both sides) of your own notes is allowed. 2. You may use a Calculator 3. Do not unstaple the exam. 4. Show all your work and reasoning on the exam in order to receive full or partial credit. Score Problem Possible Points Score 1 24 2 18 3 8 Total 50 file:///C|/Documents%20and%20Settings/Jason%20Raft. ..20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (1 of 8)1/27/2007 5:21:48 PM
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EE40 -- MT2, Fall 1998 1. Integrated Circuit Structure [24 points] Process Sequence: 1. Starting Material: boron-doped silicon, concentration 5 x 10 16 cm -3 2. Deposit 250 nm of silicon dioxide and pattern using the oxide mask (dark field) 3. Implant phosphorus and anneal (depth 500 nm and concentration 1.25 x 10 17 cm -3 4. Deposit 250 nm of slicon dioxide and then etch 250 nm of oxide using the via mask (dark field). 5. Deposit 250 nm of aresenic-doped polysiliconsilicon and pattern using the polymask (clear field). The arsenic concentration is 5 x 10 18 cm -3 6. Deposit 250 nm of silicon dioxide and then etch 500 nm of oxide using the
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Electrical Engineering 40 - Fall 1998 - Howe - Midterm 2 -...

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